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A3966SLB-T 参数 Datasheet PDF下载

A3966SLB-T图片预览
型号: A3966SLB-T
PDF下载: 下载PDF文件 查看货源
内容描述: 双路全桥式PWM电动机驱动器 [DUAL FULL-BRIDGE PWM MOTOR DRIVER]
分类和应用: 驱动器
文件页数/大小: 9 页 / 805 K
品牌: ALLEGRO [ ALLEGRO MICROSYSTEMS ]
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3966
DUAL FULL-BRIDGE
PWM MOTOR DRIVER
FUNCTIONAL DESCRIPTION
Internal PWM Current Control.
The A3966SA and
A3966SLB dual H-bridges are designed to drive both
windings of a bipolar stepper motor. Load current can be
controlled in each motor winding by an internal fixed-
frequency PWM control circuit. The current-control
circuitry works as follows: when the outputs of the H-
bridge are turned on, current increases in the motor wind-
ing. The load current is sensed by the current-control
comparator via an external sense resistor (R
S
). Load
current continues to increase until it reaches the predeter-
mined value, set by the selection of external current-
sensing resistors and reference input voltage (V
REF
)
according to the equation:
I
TRIP
= I
OUT
+ I
SO
= V
REF
/(4 R
S
)
where I
SO
is the sense-current error (typically 18 mA) due
to the base-drive current of the sink driver transistor.
At the trip point, the comparator resets the source-
enable latch, turning off the source driver of that H-bridge.
The source turn off of one H-bridge is independent of the
other H-bridge. Load inductance causes the current to
recirculate through the sink driver and ground-clamp
diode. The current decreases until the internal clock
oscillator sets the source-enable latches of both H-bridges,
turning on the source drivers of both bridges. Load current
increases again, and the cycle is repeated.
The frequency of the internal clock oscillator is set by
the external timing components R
T
C
T
. The frequency
can be approximately calculated as:
f
osc
= 1/(R
T
C
T
+ t
blank
)
where t
blank
is defined below.
The range of recommended values for R
T
and C
T
are
20 kΩ to 100 kΩ and 470 pF to 1000 pF respectively.
Nominal values of 56 kΩ and 680 pF result in a clock
frequency of 25 kHz.
Current-Sense Comparator Blanking.
When the
source driver is turned on, a current spike occurs due to
the reverse-recovery currents of the clamp diodes and
switching transients related to distributed capacitance in
the load. To prevent this current spike from erroneously
resetting the source enable latch, the current-control
comparator output is blanked for a short period of time
when the source driver is turned on. The blanking time is
set by the timing component C
T
according to the equa-
tion:
t
blank
= 1900 C
T
(µs).
A nominal C
T
value of 680 pF will give a blanking
time of 1.3 µs.
The current-control comparator is also blanked when
the H-bridge outputs are switched by the PHASE or
ENABLE inputs. This internally generated blank time is
approximately 1 µs.
V
BB
V
PHASE
See Enlargement A
+
I
OUT
0
BRIDGE
ON
ALL
OFF
BRIDGE ON
SOURCE OFF
ALL OFF
BRIDGE
ON
Enlargement A
t
d
I
TRIP
SOURCE
OFF
t
blank
INTERNAL
OSCILLATOR
R
T
C
T
Dwg. WM-003-2
RS
Dwg. EP-006-16
www.allegromicro.com
5