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A4982SLPTR-T 参数 Datasheet PDF下载

A4982SLPTR-T图片预览
型号: A4982SLPTR-T
PDF下载: 下载PDF文件 查看货源
内容描述: DMOS细分驱动器与转换器和过流保护 [DMOS Microstepping Driver with Translator and Overcurrent Protection]
分类和应用: 驱动器转换器运动控制电子器件信号电路光电二极管电动机控制
文件页数/大小: 19 页 / 522 K
品牌: ALLEGRO [ ALLEGRO MICROSYSTEMS ]
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A4982
DMOS Microstepping Driver with Translator
and Overcurrent Protection
Functional Description
Device Operation.
The A4982 is a complete microstepping
motor driver with a built-in translator for easy operation with
minimal control lines. It is designed to operate bipolar step-
per motors in full-, half-, quarter-, and sixteenth-step resolution
modes. The currents in each of the two output full-bridges and all
of the N-channel DMOS FETs are regulated with fixed off-time
PWM (pulse width modulated) control circuitry. At each step,
the current for each full-bridge is set by the value of its external
current-sense resistor (R
S1
and R
S2
), a reference voltage (V
REF
),
and the output voltage of its DAC (which in turn is controlled by
the output of the translator).
At power-on or reset, the translator sets the DACs and the phase
current polarity to the initial Home state (shown in figures 10
through 13), and the current regulator to Mixed decay mode for
both phases. When a step command signal occurs on the STEP
input, the translator automatically sequences the DACs to the
next level and current polarity. (See table 2 for the current-level
sequence.) The microstep resolution is set by the combined effect
of the MSx inputs, as shown in table 1.
When stepping, if the new output levels of the DACs are lower
than their previous output levels, then the decay mode for the
active full-bridge is set to Mixed. If the new output levels of the
DACs are higher than or equal to their previous levels, then the
decay mode for the active full-bridge is set to Slow. This auto-
matic current decay selection improves microstepping perfor-
mance by reducing the distortion of the current waveform that
results from the back EMF of the motor.
Low Current Microstepping.
Intended for applications
where the minimum on-time prevents the output current from
regulating to the programmed current level at low current steps.
To prevent this, the device can be set to operate in Mixed decay
mode on both rising and falling portions of the current waveform.
This feature is implemented by shorting the ROSC pin to ground.
In this state, the off-time is internally set to 30
μs.
¯¯ ¯¯
¯ ¯ ¯ ¯¯
Reset Input (¯ ¯ ¯ ¯ ¯ ).
The ¯ ¯ ¯ ¯ ¯ input sets the translator
RESET
RESET
to a predefined Home state (shown in figures 10 through 13), and
turns off all of the FET outputs. All STEP inputs are ignored until
¯¯ ¯¯
the ¯ ¯ ¯ ¯ ¯ input is set to high.
RESET
Step Input
(STEP)
.
A low-to-high transition on the STEP
input sequences the translator and advances the motor one incre-
ment. The translator controls the input to the DACs and the direc-
tion of current flow in each winding. The size of the increment is
determined by the combined state of inputs MS1 and MS2.
Direction Input
(DIR).
This determines the direction of rota-
tion of the motor. Changes to this input do not take effect until the
next STEP rising edge.
Internal PWM Current Control.
Each full-bridge is con-
trolled by a fixed off-time PWM current control circuit that limits
the load current to a desired value, I
TRIP
. Initially, a diagonal pair
of source and sink FET outputs are enabled and current flows
through the motor winding and the current sense resistor, R
Sx
.
When the voltage across R
Sx
equals the DAC output voltage, the
current sense comparator resets the PWM latch. The latch then
Microstep Select
(MS1 and MS2).
The microstep resolu-
tion is set by the voltage on logic inputs MS1 and MS2, as shown turns off either the source FET (when in Slow decay mode) or the
sink and source FETs (when in Mixed decay mode).
in table 1. MS1 has a 100 kΩ pull-down resistance, and MS2 has
a 33.3 kΩ pull-down resistance. When changing the step mode the The maximum value of current limiting is set by the selection of
change does not take effect until the next STEP rising edge.
R
Sx
and the voltage at the VREF pin. The transconductance func-
tion is approximated by the maximum value of current limiting,
If the step mode is changed without a translator reset, and abso-
I
TripMAX
(A), which is set by
lute position must be maintained, it is important to change the
step mode at a step position that is common to both step modes in
I
TripMAX
= V
REF
/ ( 8
R
S
)
order to avoid missing steps. When the device is powered down,
or reset due to TSD or an overcurrent event the translator is set to where R
S
is the resistance of the sense resistor (Ω) and V
REF
is
the home position which is by default common to all step modes. the input voltage on the REF pin (V).
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
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