ASM706 P/ R/ S/ T/ J
ASM708 R/ S/ T/ J
October 2003
rev 1.0
50ns (V
CC
= 4.5V), the watchdog timer will begin a 1.6
second countdown. Additional transitions at WDI will reset
the watchdog timer and initiate a new countdown sequence.
WDO will also become LOW and remain so, whenever the
supply voltage, V
CC
, falls below the device threshold level.
WDO goes HIGH as soon as V
CC
transitions above the
threshold. There is no minimum pulse width for WDO as
there is for the RESET outputs. If WDI is floated, WDO
essentially acts as a low supply voltage output indicator.
Power-failure Detection With Auxiliary Comparator
All devices have an auxiliary comparator with 1.25V trip point.
The output, PFO, is active LOW and the noninverting input is
PFI. This comparator can be used as a supply voltage
monitor with an external resistor voltage divider. As the
monitored voltage level falls, PFI is reduced causing the PFO
output to go LOW. Normally PFO interrupts the processor so
the system can be shut down in a controlled manner.
Bi-directional I/O Pin
Supply Voltage
V
CC
BUF
Buffered
RESET
Application Information
Bi-directional Reset Pin Interfacing
The ASM706/8 can interface with µP/µC bi-directional reset
pins by connecting a 4.7kΩ resistor in series with the RESET
output and the µP/µC bi-directional reset pin.
ASM70x
4.7kΩ
RESET
GND
µC or µP
RESET
Input
GND
Figure 3: Bi-directional reset pin interfacing
0V
Ensuring the RESET is Valid Down to V
CC
= 0V
When V
CC
falls below 1.2V, the ASM706R/S/T/J and 708R/S/
T/J RESET reset outputs no longer pull down; it becomes
indeterminate. To avoid the possibility that stray charges
could build up and force RESET to the wrong state, a pull-
down resistor should be connected to the RESET pin, thus
draining such charges to ground. The resistor value is not
critical. A100kΩ resistor will pull RESET to ground without
loading it.
Figure 2: Watchdog timing
3/3.3/4.0 V µP Supervisor Circuits
Notice: The information in this document is subject to change without notice
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