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EP1S30F1508I6ES 参数 Datasheet PDF下载

EP1S30F1508I6ES图片预览
型号: EP1S30F1508I6ES
PDF下载: 下载PDF文件 查看货源
内容描述: Stratix器件系列数据手册 [Stratix Device Family Data Sheet]
分类和应用: 现场可编程门阵列可编程逻辑LTE
文件页数/大小: 290 页 / 3583 K
品牌: ALTERA [ ALTERA CORPORATION ]
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Stratix Architecture
TriMatrix
Memory
TriMatrix memory consists of three types of RAM blocks: M512, M4K,
and M-RAM blocks. Although these memory blocks are different, they
can all implement various types of memory with or without parity,
including true dual-port, simple dual-port, and single-port RAM, ROM,
and FIFO buffers.
shows the size and features of the different
RAM blocks.
Table 2–3. TriMatrix Memory Features (Part 1 of 2)
Memory Feature
Maximum
performance
True dual-port
memory
Simple dual-port
memory
Single-port memory
Shift register
ROM
FIFO buffer
Byte enable
Parity bits
Mixed clock mode
Memory initialization
Simple dual-port
memory mixed width
support
True dual-port
memory mixed width
support
Power-up conditions
Register clears
Mixed-port read-
during-write
Outputs cleared
Input and output
registers
Unknown
output/old data
M512 RAM Block M4K RAM Block
(32 × 18 Bits)
(128 × 36 Bits)
M-RAM Block
(4K × 144 Bits)
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
Outputs cleared
Input and output
registers
Unknown
output/old data
v
v
v
v
v
v
v
v
v
Outputs
unknown
Output registers
Unknown output
Altera Corporation
July 2005
2–21
Stratix Device Handbook, Volume 1