FLEX 6000 Programmable Logic Device Family Data Sheet
Figure 7. LE Operating Modes
Normal Mode
Cascade-In
Carry-In
LE-Out
data1
data2
PRN
D
Q
4-Input
LUT
data3
data4
CLRN
Cascade-Out
Arithmetic Mode
Carry-In
Cascade-In
LE-Out
PRN
data1
data2
D
Q
3-Input
LUT
CLRN
3-Input
LUT
Cascade-Out
Carry-Out
LAB-Wide
Synchronous
Load (3)
Counter Mode
LAB-Wide Synchronous
Clear (3)
Cascade-In
Carry-In
(1)
data1 (2)
data2 (2)
PRN
3-Input
LUT
LE-Out
D
Q
data3 (data)
CLRN
3-Input
LUT
Carry-Out Cascade-Out
Notes:
(1) The register feedback multiplexer is available on LE 2 of each LAB.
(2) The data1 and data2 input signals can supply a clock enable, up or down control, or register feedback signals for
all LEs other than the second LE in an LAB.
(3) The LAB-wide synchronous clear and LAB-wide synchronous load affect all registers in an LAB.
14
Altera Corporation