Revision 1.07 – October 4, 2007
440GP – Power PC 440GP Embedded Processor
Data Sheet
Signal Functional Description (Sheet 2 of 7)
Notes:
1. Receiver input has hysteresis
2. Must pull up (recommended value is 3kΩ to 3.3V, 10kΩ to 5V)
3. Must pull down (recommended value is 1kΩ)
4. If not used, must pull up (recommended value is 3kΩ to 3.3V)
5. If not used, must pull down (recommended value is 1kΩ)
6. Strapping input during reset; pull-up or pull-down required
Signal Name
DDR SDRAM Interface
BA0:1
Description
I/O
Type
Notes
Bank Address supporting up to four internal banks.
Selects up to four external DDR SDRAM banks.
Column Address Strobe.
O
O
O
O
2.5V SSTL_2
2.5V SSTL_2
2.5V SSTL_2
2.5V SSTL_2
BankSel0:3
CAS
ClkEn0:3
Clock Enable. One for each bank.
Memory write data byte lane masks. MEMDM8 is the byte lane
mask for the ECC byte lane.
DM0:8
O
2.5V SSTL_2
2.5V SSTL_2
Byte lane data strobe. DQS8 is the data strobe for the ECC byte
lane.
DQS0:8
I/O
ECC0:7
ECC check bits 0:7.
Memory address bus.
I/O
O
2.5V SSTL_2
2.5V SSTL_2
MemAddr00:12
MemClkOut0
MemClkOut0
Subsystem clock.
O
I/O
I
2.5V SSTL_2
2.5V SSTL_2
MemData00:63
MemVRef1:2
Memory data bus.
Voltage Ref
Receiver
Memory reference voltage (SVREF) input.
RAS
Row Address Strobe.
Write Enable.
O
O
2.5V SSTL_2
2.5V SSTL_2
WE
Ethernet Interface
EMCCD,
MII: Collision detection
RMII 1: Receive error
5V tolerant
I/O
I/O
O
EMC1RxErr
3.3V LVTTL
EMCCrS,
EMC0CrSDV
MII: Carrier sense
RMII 0: Carrier sense data valid
5V tolerant
3.3V LVTTL
5V tolerant
3.3V LVTTL
EMCMDClk
EMCMDIO
MII and RMII: Management data clock
MII and RMII: Transfer command and status information between
MII and PHY
5V tolerant
3.3V LVTTL
I/O
EMCRxD0:3,
EMC0RxD0:1,
EMC1RxD0:1
MII: Receive data
RMII 0: Receive data
RMII 1: Receive data
5V tolerant
3.3V LVTTL
I/O
EMCRxDV,
MII: Receive data valid
5V tolerant
I
I
I
I
EMC1CrSDV
RMII 1: Carrier sense data valid
3.3V LVTTL
5V tolerant
3.3V LVTTL
EMCRxClk
MII: Receive clock
EMCRxErr,
EMC0RxErr
MII: Receive error
RMII 0: Receive error
5V tolerant
3.3V LVTTL
EMCTxClk,
EMCRefClk
MII: Transmit clock
RMII: Reference clock
5V tolerant
3.3V LVTTL
5
MII: Transmit data
RMII 0: Transmit data
RMII 1: Transmit data
EMCTxD0:3,
EMC0TxD0:1,
EMC1TxD0:1
5V tolerant
3.3V LVTTL
O
AMCC
49
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
