Revision 1.23 - Sept 21, 2006
PowerPC 440SPe Embedded Processor
Preliminary Data Sheet
Table 6. Signal Functional Description (Sheet 7 of 8)
Notes:
1. Receiver input has hysteresis
2. Must pull up (recommended value is 3kΩ to 3.3V)
3. Must pull down (recommended value is 1kΩ)
4. If not used, must pull up (recommended value is 3kΩ to 3.3V)
5. If not used, must pull down (recommended value is 1kΩ)
6. Strapping input during reset; pull-up or pull-down required
Signal Name
Description
I/O
Type
Notes
1, 2
3
Hardware initiated system reset with an initial SDRAM
self-refresh phase to save data in Memory.
HISRRst
I
3.3V LVTTL
TESTEN
Test Enable.
I
I
3.3V LVTTL
3.3V LVTTL
TMR_CLK
Processor timer external input clock.
JTAG Interface
TCK
Test Clock.
I
I
3.3V LVTTL
1
4
3.3V LVTTL
w/pull-down
TDI
Test Data In.
TDO
TMS
Test Data Out.
Test Mode Select.
O
I
3.3V LVTTL
3.3V LVTTL
with pull-up
1
5
Test Reset. During chip power-up, this signal must be
low from the start of VDD ramp-up until at least 16
SysClk cycles after VDD is stable in order to initialize the
JTAG controller.
3.3V LVTTL
with pull-up
TRST
I
Trace Interface
TrcClk
Trace data capture clock, runs at 1/4 the frequency of
the processor.
O
O
O
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
TRCBS0:2
TrcES0:4
Trace branch execution status.
Trace Execution Status is presented every fourth
processor clock cycle.
Additional information on trace execution and branch
status.
TrcTS0:6
O
3.3V LVTTL
Tests
Test scan out
SCANOUT[00][07:08] [14:21] [25]
n/a
Manufacturing test signals: No need for termination
Power
PCIE0:2AV25
2.5V supply voltage for the serial link of the PCI Express
I
I
2.5V supply voltage for the PCI Express Reference
clock Input receiver in front of the PLL
PCIE_PLLVDD2
PCIE_PLLVDDA
PCIE_PLLVDDB
Analog 2.5V filtered supply voltage A for the PLL of the
PCI Express
I
I
Analog 2.5V filtered supply voltage B for the PLL of the
PCI Express
PCIE_PLLGNDA
PCIE_PLLGNDB
PCIX0PLLG
GNDA for the PLL of the PCI Express
GNDB for the PLL of the PCI Express
Ground for the PCI-X0 PLL
I
I
n/a
n/a
n/a
Analog 1.5V Filtered Supply voltages input for PCI-X0
A separate filter for all analog voltages is recommended.
PCIX0PLLV
I
56
AMCC Proprietary
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
