Erase Suspend
The Erase Suspend command allows the user to inter-
rupt a Sector Erase operation and then perform data
reads from a sector not being erased. This command is
applicable ONLY during the Sector Erase operation
which includes the time-out period for sector erase. The
Erase Suspend command will be ignored if written dur-
ing the Chip Erase operation or Embedded Program Al-
gorithm. Writing the Erase Suspend command during
the Sector Erase time-out results in immediate termina-
tion of the time-out period and suspension of the erase
operation.
Any other command written during the Erase Sus-
pend mode will be ignored except the Erase Resume
command. Writing the Erase Resume command
resumes the erase operation. The addresses are
“don’t-cares” when writing the Erase Suspend or
Erase Resume command.
When the Erase Suspend command is written during
the Sector Erase operation, the device will take a max-
imum of 15
µs
to suspend the erase operation. When
the device has entered the erase-suspended mode,
DQ7 bit will be at logic “1”, and DQ6 will stop toggling.
The user must use the address of the erasing sector for
reading DQ6 and DQ7 to determine if the erase opera-
tion has been suspended. Further writes of the Erase
Suspend command are ignored.
When the erase operation has been suspended, the
device defaults to the erase-suspend-read mode.
Reading data in this mode is the same as reading from
the standard read mode except that the data must be
read from sectors that have not been erase-suspended.
To resume the operation of Sector Erase, the Resume
command (30H) should be written. Any further writes of
the Resume command at this point will be ignored. An-
other Erase Suspend command can be written after the
chip has resumed erasing.
Write Operation Status
Table 5.
Status
Byte Programming in Embedded Algorithm
Embedded Erase Algorithm
In Progress
Erase
Erase Suspended Sector
Suspended
Non-Erase Suspended Sector
Mode
Byte-Programming in Embedded Algorithm
Embedded Erase Algorithm
Write Operation Status
DQ7
DQ7
0
1
Data
DQ7
0
DQ6
Toggle
Toggle
No Toggle
Data
Toggle
Toggle
DQ5
0
0
0
Data
1
1
DQ3
0
1
1
Data
0
1
Exceeded
Time Limits
DQ7
Data Polling
The Am29F040 device features Data Polling as a
method to indicate to the host that the Embedded
Algorithms are in progress or completed. During the
Embedded Program Algorithm an attempt to read the
device produces the compliment of the data last written
to DQ7. Upon completion of the Embedded Program
Algorithm, reading the device produces the true data
last written to DQ7. During the Embedded Erase Algo-
rithm, reading the device produces a “0” at the DQ7
output. Upon completion of the Embedded Erase Algo-
rithm, reading the device produces a “1” at the DQ7
output. The flowchart for Data Polling (DQ7) is shown
in Figure 3.
For chip erase, the Data Polling is valid after the rising
edge of the sixth WE pulse in the six write pulse se-
quence. For sector erase, the Data Polling is valid after
the last rising edge of the sector erase WE pulse. Data
Polling must be performed at sector address within any
of the sectors being erased and
not
a protected sector.
Otherwise, the status may not be valid. Once the Em-
bedded Algorithm operation is close to being com-
pleted, the Am29F040 data pins (DQ7) may change
asynchronously while the output enable (OE) is as-
serted low. This means that the device is driving status
information on DQ7 at one instant of time and then that
byte’s valid data at the next instant of time. Depending
on when the system samples the DQ7 output, it may
read the status or valid data. Even if the device has
completed the Embedded Algorithm operation and
DQ7 has a valid data, the data outputs on DQ0–DQ6
may be still invalid. The valid data on DQ0–DQ7 will be
read on the successive read attempts.
The Data Polling feature is active during the Embedded
Programming Algorithm, Embedded Erase Algorithm,
Erase Suspend, or sector erase time-out (see Table 5).
Am29F040
11
AMD [ ADVANCED MICRO DEVICES ]
