D A T A
in this mode. Refer to the Autoselect Mode and Autose-
information.
I
CC2
in the DC Characteristics table represents the
active current specification for the write mode. The “AC
tables and timing diagrams for write operations.
S H E E T
the standby mode, but the standby current will be
greater. The device requires standard access time (t
CE
)
for read access when the device is in either of these
standby modes, before it is ready to read data.
If the device is deselected during erasure or program-
ming, the device draws active current until the
operation is completed.
I
CC3
in the DC Characteristics table represents the
standby current specification.
Program and Erase Operation Status
During an erase or program operation, the system may
check the status of the operation by reading the status
bits on DQ7–DQ0. Standard read cycle timings and I
CC
read specifications apply. Refer to “Write Operation
Automatic Sleep Mode
The automatic sleep mode minimizes Flash device
energy consumption. The device automatically enables
this mode when addresses remain stable for t
ACC
+ 30
ns. The automatic sleep mode is independent of the
CE#, WE#, and OE# control signals. Standard address
access timings provide new data when addresses are
changed. While in sleep mode, output data is latched
and always available to the system. I
CC4
in the DC
mode current specification.
Standby Mode
When the system is not reading or writing to the device,
it can place the device in the standby mode. In this
mode, current consumption is greatly reduced, and the
outputs are placed in the high impedance state, inde-
pendent of the OE# input.
The device enters the CMOS standby mode when the
CE# pin is both held at V
CC
±
0.3 V. (Note that this is a
more restricted voltage range than V
IH
.) If CE# is held
at V
IH
, but not within V
CC
±
0.3 V, the device will be in
Output Disable Mode
When the OE# input is at V
IH
, output from the device is
disabled. The output pins are placed in the high imped-
ance state.
Table 2.
Sector
SA0
SA1
SA2
SA3
SA4
SA5
SA6
SA7
A18
0
0
0
0
1
1
1
1
Am29LV040BT Sector Address Table
A17
0
0
1
1
0
0
1
1
A16
0
1
0
1
0
1
0
1
Address Range
(in hexadecimal)
00000h-0FFFFh
10000h-1FFFFh
20000h-2FFFFh
30000h-3FFFFh
40000h-4FFFFh
50000h-5FFFFh
60000h-6FFFFh
70000h-7FFFFh
Autoselect Mode
The autoselect mode provides manufacturer and
device identification, and sector protection verification,
through identifier codes output on DQ7–DQ0. This
mode is primarily intended for programming equipment
to automatically match a device to be programmed with
its corresponding programming algorithm. However,
the autoselect codes can also be accessed in-system
through the command register.
When using programming equipment, the autoselect
mode requires V
ID
(11.5 V to 12.5 V) on address pin
A9. Address pins A6, A1, and A0 must be as shown in
the sector address must appear on the appropriate
highest order address bits (see Table 2). Table 3 shows
the remaining address bits that are don’t care. When all
necessary bits have been set as required, the program-
ming equipment may then read the corresponding
identifier code on DQ7–DQ0.
To access the autoselect codes in-system, the host
system can issue the autoselect command via the
command register, as shown in Table 4. This method
does not require V
ID
. See “Command Definitions” for
details on using the autoselect mode.
October 11, 2006 21354E4
Am29LV040B
11
AMD [ ADVANCED MICRO DEVICES ]
