D A T A S H E E T
AC CHARACTERISTICS
Alternate CE# Controlled Erase/Program Operations
Parameter
Speed Options
JEDEC
tAVAV
Std
tWC
tAS
Description
-65R
-70R
70
0
-90
Unit
ns
Write Cycle Time (Note 1)
Address Setup Time
Address Hold Time
Data Setup Time
Min
Min
Min
Min
Min
Min
65
90
tAVEL
ns
tELAX
tDVEH
tEHDX
tAH
45
35
45
35
0
45
45
ns
tDS
ns
tDH
tOES
Data Hold Time
ns
Output Enable Setup Time
0
ns
Read Recovery Time Before Write
(OE# High to WE# Low)
tGHEL
tGHEL
Min
0
ns
tWLEL
tEHWH
tELEH
tEHEL
tWS
tWH
tCP
WE# Setup Time
WE# Hold Time
Min
Min
Min
Min
Typ
Typ
Typ
0
0
ns
ns
ns
ns
CE# Pulse Width
CE# Pulse Width High
35
35
30
7
35
tCPH
Byte
ProgrammingOperation(Note
2)
tWHWH1
tWHWH2
tWHWH1
tWHWH2
µs
Word
9
Sector Erase Operation (Note 2)
5
sec
Notes:
1. Not 100% tested.
2. See the “Erase and Programming Performance” section for more information.
36
Am29PL160C
22143C7 May 9, 2006
AMD [ AMD ]
