欢迎访问ic37.com |
会员登录 免费注册
发布采购

AM29PL160CB-90SI 参数 Datasheet PDF下载

AM29PL160CB-90SI图片预览
型号: AM29PL160CB-90SI
PDF下载: 下载PDF文件 查看货源
内容描述: 16兆位(2M ×8位/ 1的M× 16位) CMOS 3.0伏只高性能页模式闪存 [16 Megabit (2 M x 8-Bit/1 M x 16-Bit) CMOS 3.0 Volt-only High Performance Page Mode Flash Memory]
分类和应用: 闪存内存集成电路光电二极管
文件页数/大小: 44 页 / 846 K
品牌: AMD [ ADVANCED MICRO DEVICES ]
 浏览型号AM29PL160CB-90SI的Datasheet PDF文件第36页浏览型号AM29PL160CB-90SI的Datasheet PDF文件第37页浏览型号AM29PL160CB-90SI的Datasheet PDF文件第38页浏览型号AM29PL160CB-90SI的Datasheet PDF文件第39页浏览型号AM29PL160CB-90SI的Datasheet PDF文件第41页浏览型号AM29PL160CB-90SI的Datasheet PDF文件第42页浏览型号AM29PL160CB-90SI的Datasheet PDF文件第43页浏览型号AM29PL160CB-90SI的Datasheet PDF文件第44页  
D A T A
S H E E T
ERASE AND PROGRAMMING PERFORMANCE
Parameter
Sector Erase Time
Chip Erase Time
Byte Programming Time
Word Programming Time
Chip Programming Time
Byte Mode
Word Mode
Typ (Note 1)
5
40
7
9
14
9
300
360
42
27
Max (Note 2)
60
Unit
s
s
µs
µs
s
s
Excludes system level
overhead (Note 5)
Comments
Excludes 00h programming
prior to erasure (Note 4)
Notes:
1. Typical program and erase times assume the following conditions: 25
°
C, 3.0 V V
CC
, 1,000,000 cycles. Additionally,
programming typicals assume checkerboard pattern.
2. Under worst case conditions of 90°C, V
CC
= 2.7 V, 1,000,000 cycles.
3. The typical chip programming time is considerably less than the maximum chip programming time listed, since most bytes
program faster than the maximum program times listed.
4. In the pre-programming step of the Embedded Erase algorithm, all bytes are programmed to 00h before erasure.
5. System-level overhead is the time required to execute the two- or four-bus-cycle sequence for the program command. See
6. The device has a minimum erase and program cycle endurance of 1,000,000 cycles.
LATCHUP CHARACTERISTICS
Description
Input voltage with respect to V
SS
on all pins except I/O pins
(including A9 and OE#)
Input voltage with respect to V
SS
on all I/O pins
V
CC
Current
Includes all pins except V
CC
. Test conditions: V
CC
= 3.0 V, one pin at a time.
Min
–1.0 V
–1.0 V
–100 mA
Max
12.5 V
V
CC
+ 1.0 V
+100 mA
TSOP AND SO PIN CAPACITANCE
Parameter
Symbol
C
IN
C
OUT
C
IN2
Parameter Description
Input Capacitance
Output Capacitance
Control Pin Capacitance
Test Setup
V
IN
= 0
V
OUT
= 0
TSOP
V
IN
= 0
SO
Typ
6
8.5
7.5
8
Max
7.5
12
9
10
Unit
pF
pF
pF
pF
Notes:
1. Sampled, not 100% tested.
2. Test conditions T
A
= 25°C, f = 1.0 MHz.
DATA RETENTION
Parameter
Minimum Pattern Data Retention Time
125°C
* For reference only. BSC is an ANSI standard for Basic Space Centering.
20
Years
Test Conditions
150°C
Min
10
Unit
Years
38
Am29PL160C
22143C7 May 9, 2006