AMD
SWITCHING CHARACTERISTICS over operating ranges unless otherwise specified
No.
Parameters
Description
Test Conditions
Min
Max
Unit
Receiver Specification
1
2
tRCT
tRCH
tRCL
tRCR
tRCF
tRDR
tRDF
tRDH
tRDS
tDPH
RCLK Cycle Time
85
38
38
118
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
RCLK HIGH Time
3
RCLK LOW Time
4
RCLK Rise Time
8
8
8
8
5
RCLK Fall Time
(Note 8)
6
RX Rise Time
7
RX Fall Time
8
RX Hold Time (RCLK ↑ to RX Change)
RX Prop Delay (RCLK ↑ to RX Stable)
5
9
25
80
10
RENA Turn-On Delay (VIDC Max on
Receive ± to RENAH)
11
tDPO
RENA Turn-On Delay (VIDC Min on
Receive ± to RENAL)
(Note 9)
300
20
ns
12
13
tDPL
RENA LOW Time
(Note 10)
120
45
ns
ns
tRPWR
Receive ± Input Pulse Width to Reject
(|Input| > |VIDC Max|)
(Note 4)
14
tRPWO
Receive ± Input Pulse Width to Turn-On
ns
(|Input| > |VIDC Max|)
15
16
17
tRLT
Decoder Acquisition Time
450
80
ns
ns
ns
tREDH
tRPWN
RENA Hold Time (RCLK ↑ to RENAL)
40
Receive ± Input Pulse Width to
165
Not Turn-Off INTCARR
Collision Specification
18
19
20
21
22
23
tCPWR
tCPWO
tCPWE
tCPWN
tCPH
Collision ± Input Pulse Width to Not
Turn-On CLSN (|Input| > |VIDC Min|)
10
ns
ns
ns
ns
ns
ns
Collision ± Input Pulse Width to Turn-On
CLSN (|Input| > |VIDC Max|)
26
(Note 4)
Collision ± Input Pulse Width to Turn-Off
CLSN (|Input| > |VIDC Max|)
160
Collision ± Input Pulse Width to Not
Turn-Off CLSN (|Input| < |VIDC Max|)
80
50
CLSN Turn-On Delay (VIDC Max on
Collision ± to CLSNH)
tCPO
CLSN Turn-Off Delay (VIDC Max on
160
Collision ± to CLSNL)
14
Am7992B
AMD [ AMD ]
