A23L1616/A23L16161/A23L16162 Series
Timing Waveforms
Propagation Delay from Address ( CE = Active, OE = Active)
t
CYC
ADDRESS
INPUTS
VALID
t
AA
t
OH
DATA OUT
VALID
Propagation Delay from Chip Enable or Output Enable (Address Valid)
CHIP
ENABLE
VALID
t
ACE
OUTPUT
ENABLE
VALID
t
LZ
t
AOE
t
HZ
DATA OUT
VALID
AC Test Conditions
Part No.
Applied Voltage
Input Pulse Levels
Input Rise and Fall Time
Timing Measurement Reference Level
Output Load
A23L1616/A23L16161/A23L16162-70
3.0V~3.6V
0.4V to 2.4V
10 ns
V
IN
= 1.4V, V
OUT
= 1.4V
1 TTL gate and C
L
=
100pF
A23L1616/A23L16161/A23L16162-100
2.7V~3.6V
0.4V to 2.4V
10 ns
V
IN
= 1.4V, V
OUT
= 1.4V
1 TTL gate and C
L
=
100pF
PRELIMINARY
(September, 2002, Version 0.1)
7
AMIC Technology, Inc.
AMICC [ AMIC TECHNOLOGY ]
