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A29L040 参数 Datasheet PDF下载

A29L040图片预览
型号: A29L040
PDF下载: 下载PDF文件 查看货源
内容描述: 512K ×8位CMOS 3.0伏只,统一部门快闪记忆体 [512K X 8 Bit CMOS 3.0 Volt-only, Uniform Sector Flash Memory]
分类和应用:
文件页数/大小: 32 页 / 304 K
品牌: AMICC [ AMIC TECHNOLOGY ]
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A29L040 Series  
512K X 8 Bit CMOS 3.0 Volt-only,  
Uniform Sector Flash Memory  
Preliminary  
Features  
nSingle power supply operation  
- Full voltage range: 2.7 to 3.6 volt read and write  
operations for battery-powered applications  
- Regulated voltage range: 3.0 to 3.6 volt read and  
write operations for compatibility with high  
performance 3.3 volt microprocessors  
nAccess times:  
- Embedded Erase algorithm will automatically erase  
the entire chip or any combination of designated  
sectors and verify the erased sectors  
- Embedded Program algorithm automatically writes  
and verifies bytes at specified addresses  
nTypical 100,000 program/erase cycles per sector  
n20-year data retention at 125°C  
- Reliable operation for the life of the system  
nCompatible with JEDEC-standards  
- 70 (max.)  
nCurrent:  
- 4 mA typical active read current  
- 20 mA typical program/erase current  
- 200 nA typical CMOS standby  
- Pinout and software compatible with single-power-  
supply Flash memory standard  
- Superior inadvertent write protection  
- 200 nA Automatic Sleep Mode current  
nFlexible sector architecture  
n
Polling and toggle bits  
- Provides a software method of detecting completion  
of program or erase operations  
Data  
- 8 uniform sectors of 64 Kbyte each  
- Any combination of sectors can be erased  
- Supports full chip erase  
nErase Suspend/Erase Resume  
- Suspends a sector erase operation to read data  
from, or program data to, a non-erasing sector, then  
resumes the erase operation  
- Sector protection:  
A hardware method of protecting sectors to prevent  
any inadvertent program or erase operations within  
that sector  
nPackage options  
- 32-pin DIP, PLCC, TSOP (8mm x 20mm) or sTSOP  
(8mm x 14mm)  
nEmbedded Erase Algorithms  
General Description  
The A29L040 is a 3.0 volt-only Flash memory organized as  
524,288 bytes of 8 bits each. The 512 Kbytes of data are  
further divided into eight sectors of 64 Kbytes each for  
flexible sector erase capability. The 8 bits of data appear on  
I/O0 - I/O7 while the addresses are input on A0 to A18. The  
A29L040 is offered in 32-pin PLCC, TSOP (8mm x 20mm)  
or sTSOP (8mm x 14mm) packages. This device is  
designed to be programmed in-system with the standard  
system 3.0 volt VCC supply. Additional 12.0 volt VPP is not  
required for in-system write or erase operations. However,  
the A29L040 can also be programmed in standard EPROM  
programmers.  
The A29L040 has a second toggle bit, I/O2, to indicate  
whether the addressed sector is being selected for erase,  
and also offers the ability to program in the Erase Suspend  
mode. The standard A29L040 offers access times of 70ns,  
allowing high-speed microprocessors to operate without  
wait states. To eliminate bus contention the device has  
The device requires only a single 3.0 volt power supply for  
both read and write functions. Internally generated and  
regulated voltages are provided for the program and erase  
operations.  
The A29L040 is entirely software command set compatible  
with the JEDEC single-power-supply Flash standard.  
Commands are written to the command register using  
standard microprocessor write timings. Register contents  
serve as input to an internal state-machine that controls the  
erase and programming circuitry. Write cycles also  
internally latch addresses and data needed for the  
programming and erase operations. Reading data out of the  
device is similar to reading from other Flash or EPROM  
devices.  
Device programming occurs by writing the proper program  
command sequence. This initiates the Embedded Program  
algorithm - an internal algorithm that automatically times the  
program pulse widths and verifies proper program margin.  
Device erasure occurs by executing the proper erase  
command sequence. This initiates the Embedded Erase  
separate chip enable (  
), write enable (  
) and output  
WE  
CE  
enable (  
) controls.  
OE  
algorithm  
-
an internal algorithm that automatically  
preprograms the array (if it is not already programmed)  
PRELIMINARY  
(June, 2003, Version 0.1)  
1
AMIC Technology, Corp.