A29L040 Series
before executing the erase operation. During erase, the
device automatically times the erase pulse widths and
verifies proper erase margin.
The hardware sector protection feature disables operations
for both program and erase in any combination of the
sectors of memory. This can be achieved via programming
equipment.
The host system can detect whether a program or erase
The Erase Suspend feature enables the user to put erase
on hold for any period of time to read data from, or program
data to, any other sector that is not selected for erasure.
True background erase can thus be achieved.
Power consumption is greatly reduced when the device is
placed in the standby mode.
operation is complete by reading the I/O7 (
Polling)
Data
and I/O6 (toggle) status bits. After a program or erase cycle
has been completed, the device is ready to read array data
or accept another command.
The sector erase architecture allows memory sectors to be
erased and reprogrammed without affecting the data
contents of other sectors. The A29L040 is fully erased when
shipped from the factory.
Pin Configurations
nDIP
nPLCC
1
VCC
WE
32
31
30
A18
A16
A15
2
3
4
5
6
A17
A12
A7
A14
A13
A8
29
28
27
26
5
6
7
8
A14
A13
A8
A7
A6
A5
A4
29
28
A6
27
26
25
24
23
22
21
A5
A4
A3
A9
7
8
A9
A11
OE
25
24
23
22
9
A29L040L
A11
OE
A10
CE
A3
A2
9
10
A10
10
11
A2
A1
11
12
13
A1
A0
CE
A0
I/O7
12
13
14
15
16
21
20
19
18
17
I/O7
I/O0
I/O0
I/O6
I/O5
I/O4
I/O3
I/O1
I/O2
VSS
n 32-pin TSOP (8mm X 20mm)
n 32-pin sTSOP (8mm X 14mm)
A11
1
32
OE
A9
A8
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A10
CE
A13
A14
A17
WE
VCC
A18
A16
A15
A12
A7
I/O
I/O
I/O
I/O
I/O
7
6
5
4
3
A29L040V (8mm x 20mm)
A29L040X (8mm x 14mm)
VSS
I/O
I/O
I/O
A0
A1
A2
A3
2
1
0
A6
A5
A4
PRELIMINARY
(June, 2003, Version 0.1)
2
AMIC Technology, Corp.
AMICC [ AMIC TECHNOLOGY ]
