欢迎访问ic37.com |
会员登录 免费注册
发布采购

A29L800ATV-70F 参数 Datasheet PDF下载

A29L800ATV-70F图片预览
型号: A29L800ATV-70F
PDF下载: 下载PDF文件 查看货源
内容描述: 1M ×8位/ 512K ×16位CMOS 3.0伏只,引导扇区闪存 [1M X 8 Bit / 512K X 16 Bit CMOS 3.0 Volt-only, Boot Sector Flash Memory]
分类和应用: 闪存
文件页数/大小: 36 页 / 503 K
品牌: AMICC [ AMIC TECHNOLOGY ]
 浏览型号A29L800ATV-70F的Datasheet PDF文件第10页浏览型号A29L800ATV-70F的Datasheet PDF文件第11页浏览型号A29L800ATV-70F的Datasheet PDF文件第12页浏览型号A29L800ATV-70F的Datasheet PDF文件第13页浏览型号A29L800ATV-70F的Datasheet PDF文件第15页浏览型号A29L800ATV-70F的Datasheet PDF文件第16页浏览型号A29L800ATV-70F的Datasheet PDF文件第17页浏览型号A29L800ATV-70F的Datasheet PDF文件第18页  
A29L800A Series  
Table 5. A29L800A Command Definitions  
Bus Cycles (Notes 2 - 5)  
Command  
Sequence  
(Note 1)  
First  
Addr Data Addr Data  
RA RD  
Second  
Third  
Fourth  
Fifth  
Sixth  
Addr Data Addr Data  
Addr Data  
Addr Data  
1
1
Read (Note 6)  
Reset (Note 7)  
XXX F0  
555  
Word  
Byte  
Word  
Byte  
2AA  
555  
2AA  
555  
Manufacturer ID  
4
4
AA  
55  
55  
90 X00  
37  
AAA  
AAA  
555  
B31A  
1A  
555  
AA  
AAA  
X01  
90  
Device ID,  
Top Boot Block  
555  
2AA  
555  
AAA  
555  
X02  
Word  
Byte  
B39B  
9B  
555  
AA  
90  
X01  
X02  
X03  
Device ID,  
Bottom Boot Block  
55  
4
4
AAA  
AAA  
Word  
555  
AA  
2AA  
555  
Continuation ID  
55  
90  
7F  
Byte  
Word  
Byte  
X06  
PA  
AAA  
555  
555  
AAA  
555  
2AA  
Program  
4
3
AA  
55  
55  
A0  
20  
PD  
AAA  
555  
2AA  
555  
PA  
AAA  
555  
AAA  
Word  
Byte  
555  
AAA  
Unlock Bypass  
AA  
2
2
XXX A0  
XXX 90  
PD  
00  
Unlock Bypass Program (Note 10)  
Unlock Bypass Reset (Note 11)  
Word  
XXX  
2AA  
555  
2AA  
555  
555  
AA  
555  
AAA  
555  
555  
AAA  
555  
2AA  
55  
555  
10  
Chip Erase  
6
6
55  
55  
80  
80  
AA  
AA  
Byte  
AAA  
555  
AAA  
Word  
555  
2AA  
55  
Sector Erase  
AA  
SA  
30  
Byte  
AAA  
AAA  
AAA  
555  
1
1
XXX B0  
XXX 30  
Erase Suspend (Note 12)  
Erase Resume (Note 13)  
Legend:  
X = Don't care  
RA = Address of the memory location to be read.  
RD = Data read from location RA during read operation.  
PA = Address of the memory location to be programmed. Addresses latch on the falling edge of the  
happens later.  
or  
pulse, whichever  
CE  
WE  
PD = Data to be programmed at location PA. Data latches on the rising edge of  
or  
pulse, whichever happens first.  
CE  
WE  
SA = Address of the sector to be verified (in autoselect mode) or erased. Address bits A18 - A12 select a unique sector.  
Note:  
1. See Table 1 for description of bus operations.  
2. All values are in hexadecimal.  
3. Except when reading array or autoselect data, all bus cycles are write operation.  
4. Data bits I/O15~I/O8 are don’t care for unlock and command cycles.  
5. Address bits A18 - A11 are don't cares for unlock and command cycles, unless SA or PA required.  
6. No unlock or command cycles required when reading array data.  
7. The Reset command is required to return to reading array data when device is in the autoselect mode, or if I/O5 goes high (while  
the device is providing status data).  
8. The fourth cycle of the autoselect command sequence is a read cycle.  
9. The data is 00h for an unprotected sector and 01h for a protected sector. See “Autoselect Command Sequence” for more information.  
10. The Unlock Bypass command is required prior to the Unlock Bypass Program command.  
11. The Unlock Bypass Reset command is required to return to reading array data when the device is in the unlock bypass mode.  
12. The system may read and program in non-erasing sectors, or enter the autoselect mode, when in the Erase Suspend mode.  
13. The Erase Resume command is valid only during the Erase Suspend mode.  
(June, 2005, Version 1.1)  
13  
AMIC Technology, Corp.