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A43E1616V-75I 参数 Datasheet PDF下载

A43E1616V-75I图片预览
型号: A43E1616V-75I
PDF下载: 下载PDF文件 查看货源
内容描述: 1M ×16位×4银行同步DRAM [1M X 16 Bit X 4 Banks Synchronous DRAM]
分类和应用: 动态存储器
文件页数/大小: 42 页 / 502 K
品牌: AMICC [ AMIC TECHNOLOGY ]
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A43L2616B
Operating AC Parameter
(AC operating conditions unless otherwise noted)
Version
Symbol
Parameter
-6
-7
Unit
Note
t
RRD(min)
t
RCD(min)
t
RP(min)
t
RAS(min)
Row active to row active delay
RAS to
CAS
delay
Row precharge time
12
18
18
42
14
20
20
42
100
ns
ns
ns
ns
μ
s
1
1
1
1
Row active time
t
RAS(max)
t
RC(min)
t
CDL(min)
t
RDL(min)
t
BDL(min)
t
CCD(min)
Row cycle time
Last data in new col. Address delay
Last data in row precharge
Last data in to burst stop
Col. Address to col. Address delay
CAS Latency = 3
Number of valid output data
CAS Latency = 2
1
60
6
12
6
6
2
ea
3
63
7
14
7
7
ns
ns
ns
ns
ns
1
2
2
2
Note:
1. The minimum number of clock cycles is determined by dividing the minimum time required with clock cycle time and
then rounding off to the next higher integer.
2. Minimum delay is required to complete write.
3. In case of row precharge interrupt, auto precharge and read burst stop.
(December, 2009, Version 1.3)
7
AMIC Technology, Corp.