A43L8316
Operating AC Parameter
(AC operating conditions unless otherwise noted)
Version
-8
Symbol
Parameter
CAS
Latency
Unit
Note
-7
-10
3
2
3
2
3
2
3
2
3
2
3
2
3
2
3
2
3
2
3
2
3
2
tRRD(min)
tRCD(min)
tRP(min)
Row active to row active delay
2
2
2
2
2
CLK
CLK
CLK
CLK
1
1
1
1
3
2
3
2
7
5
3
3
RAS to
delay
CAS
Row precharge time
6
5
tRAS(min)
tRAS(max)
6
Row active time
100
100
120
10
1
ms
10
7
9
7
tRC(min)
tCDL(min)
tRDL(min)
tBDL(min)
tCCD(min)
Row cycle time
CLK
CLK
CLK
CLK
CLK
1
2
2
2
Last data in new col. Address delay
Last data in row precharge
Last data in to burst stop
Col. Address to col. Address delay
1
1
1
1
1
1
1
1
1
1
1
2
1
2
1
2
1
CLK
CLK
4
Number of valid output data
Note: 1. The minimum number of clock cycles is determined by dividing the minimum time required with clock cycle time
and then rounding off to the next higher integer.
2. Minimum delay is required to complete write.
3. All parts allow every cycle column address change.
4. In case of row precharge interrupt, auto precharge and read burst stop.
Preliminary (April, 2000, Version 1.0)
8
AMIC Technology, Inc.
AMICC [ AMIC TECHNOLOGY ]
