LP62S16256E-T Series
Block Diagram
VCC
GND
A0
512 X 8192
DECODER
MEMORY ARRAY
A16
A17
I/O1
I/O9
COLUMN I/O
INPUT
DATA
INPUT
DATA
CIRCUIT
CIRCUIT
I/O16
I/O8
CE
LB
HB
CONTROL
CIRCUIT
OE
WE
Pin Descriptions -- TSOP
Pin No.
Symbol
Description
1 - 5, 18 - 27,
42 - 44
A0 - A17
Address Inputs
6
Chip Enable Input
CE
7 - 10, 13 - 16,
29 - 32, 35 - 38
I/O1 - I/O16
Data Inputs/Outputs
Write Enable Input
17
39
40
41
WE
LB
Lower Byte Enable Input (I/O1 to I/O8)
Higher Byte Enable Input (I/O9 to I/O16)
Output Enable Input
HB
OE
VCC
GND
NC
11, 33
12, 34
28
Power
Ground
No Connection
(January, 2002, Version 2.0)
3
AMIC Technology, Inc.
AMICC [ AMIC TECHNOLOGY ]
