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LP62S16512-T 参数 Datasheet PDF下载

LP62S16512-T图片预览
型号: LP62S16512-T
PDF下载: 下载PDF文件 查看货源
内容描述: 512K x 16位的低电压CMOS SRAM [512K X 16 BIT LOW VOLTAGE CMOS SRAM]
分类和应用: 静态存储器
文件页数/大小: 14 页 / 153 K
品牌: AMICC [ AMIC TECHNOLOGY ]
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LP62S16512-T Series
AC Characteristics
(T
A
= -25°C to +85°C, VCC = 2.7V to 3.6V)
Symbol
Parameter
LP62S16512-55LLT
Min.
Read Cycle
t
RC
t
AA
t
Acs1 ,
t
Acs2
t
BE
t
OE
t
CLZ1 ,
t
CLZ2
t
BLZ
t
OLZ
t
CHZ1 ,
t
CHZ2
t
BHZ
t
OHZ
t
OH
Write Cycle
t
WC
t
CW1 ,
t
CW2
t
BW
t
AS
t
AW
t
WP
t
WR
t
WHZ
t
DW
t
DH
t
OW
Write Cycle Time
Chip Enable to End of Write
Byte Enable to End of Write
Address Setup Time
Address Valid to End of Write
Write Pulse Width
Write Recovery Time
Write to Output in High Z
Data to Write Time Overlap
Data Hold from Write Time
Output Active from End of Write
55
50
50
0
50
40
0
-
25
0
5
-
-
-
-
-
-
-
25
-
-
-
70
60
60
0
60
50
0
-
30
0
5
-
-
-
-
-
-
-
25
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Read Cycle Time
Address Access Time
Chip Enable Access Time
Byte Enable Access Time
Output Enable to Output Valid
Chip Enable to Output in Low Z
Byte Enable to Output in Low Z
Output Enable to Output in Low Z
Chip Disable to Output in High Z
Byte Disable to Output in High Z
Output Disable to Output in High Z
Output Hold from Address Change
55
-
-
-
-
10
10
5
-
-
-
5
-
55
55
55
25
-
-
-
20
20
20
-
70
-
-
-
-
10
10
5
-
-
-
5
-
70
70
70
35
-
-
-
25
25
25
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Max.
LP62S16512-70LLT
Min.
Max.
Unit
Note: t
CLZ1 ,
t
CLZ2 ,
t
BLZ
, t
OLZ
, t
CHZ1
, t
CHZ2 ,
t
BHZ
and t
OHZ
and t
WHZ
are defined as the time at which the outputs achieve the
open circuit condition and are not referred to output voltage levels.
PRELIMINARY
(March, 2002, Version 0.2)
6
AMIC Technology, Inc.