AS1361/AS1362
Datasheet - D e t a i l e d D e s c r i p t i o n
8 Detailed Description
The AS1361/AS1362 are ultra-low-noise, low-dropout, low-quiescent current linear-regulators specifically designed for
space-limited applications. The devices are available with preset output voltages from 1.5 to 4.5V in 50mV increments.
These devices can supply loads up to 150/300mA. As shown in
the AS1361/AS1362 consist of an inte-
grated bandgap core and noise bypass circuitry, error amplifier, P-channel MOSFET pass transistor, and internal feed-
back voltage-divider.
The output voltage is fed back through an internal resistor voltage-divider connected to pin OUT. An external bypass
capacitor connected to pin BYPASS reduces noise at the output. Additional blocks include a current limiter, thermal
sensor, and shutdown logic.
Internal Voltage Reference
The 1.25V bandgap reference is connected to the error amplifier’s inverting input. The error amplifier compares this
reference with the feedback voltage and amplifies the difference. If the feedback voltage is lower than the reference
voltage, the pass-transistor gate is pulled low. This allows more current to pass to the output and increases the output
voltage. If the feedback voltage is too high, the pass transistor gate is pulled high, allowing less current to pass to the
output.
Internal P-Channel Pass Transistor
The AS1361/AS1362 feature a 0.5Ω (typ) P-channel MOSFET pass transistor, which provides several advantages
over similar designs using a PNP pass transistor, including prolonged battery life. The P-channel MOSFET does not
require a base driver, thus quiescent current is dramatically reduced. The AS1361/AS1362 LDOs do not exhibit prob-
lems associated with typical PNP-based LDOs, and consume only 40µA of quiescent current in light load and 220µA in
dropout
Output Voltage
The AS1361/AS1362 deliver preset output voltages from 1.5 to 4.5V, in 50mV increments
Shutdown
The AS1361/AS1362 feature a low-power shutdown mode that reduces quiescent current to <200nA. Driving SHDNN
low disables the internal voltage reference, error amplifier, gate-drive circuitry, and P-channel MOSFET pass transistor
and the device output enters a high-impedance state.
Note:
For normal operation connect pin SHDNN to pin IN.
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