ALT6708
Table 4: Electrical Specifications - LTE Operation (RB = 12, START = 0, QPSK)
(T
C
= +25 °C, V
BATT
= V
CC
= +3.4 V, V
EN
= +1.8 V, 50 Ω system)
PARAMETER
MIN
25
14
9
-
-
-
-
-
-
-
-
-
31
18
12
-
-
-
-
-
-
-
-
-
-
-
-
TYP
27.5
17.5
12.5
-39
-39
-40
-39
-40
-40
-59
-60
-60
35
22
17
2.8
0.06
0.03
0.8
<5
-133
-50
-58
-
20
20
0.35
MAX
31
21
16
-35
-35
-35
-37
-37
-37
-40
-40
-40
-
-
-
4.5
0.15
0.1
1.5
10
-
-35
-45
2:1
-
-
-
UNIT
COMMENTS
P
OUT
P
OUT
= +27.7 dBm
P
OUT
= +16 dBm
P
OUT
= +6.5 dBm
P
OUT
= +27.7 dBm
P
OUT
= +16 dBm
P
OUT
= +6.5 dBm
P
OUT
= +27.7 dBm
P
OUT
= +16 dBm
P
OUT
= +6.5 dBm
P
OUT
= +27.7 dBm
P
OUT
= +16 dBm
P
OUT
= +6.5 dBm
P
OUT
= +27.7 dBm
P
OUT
= +16 dBm
P
OUT
= +6.5 dBm
through V
CC
pin
V
MODE1
0V
1.8 V
1.8 V
0V
1.8 V
1.8 V
0V
1.8 V
1.8 V
0V
1.8 V
1.8 V
0V
1.8 V
1.8 V
1.8 V
V
MODE2
0V
0V
1.8 V
0V
0V
1.8 V
0V
0V
1.8 V
0V
0V
1.8 V
0V
0V
1.8 V
1.8 V
Gain
dB
ACLR E-UTRA
at
10 MHz offset
ACLR UTRA
at
7.5 MHz offset
ACLR UTRA
at
12.5 MHz offset
dBc
dBc
dBc
Power-Added Efficiency
Quiescent Current (Icq)
Low Bias Mode
Mode Control Current
Enable Current
BATT Current
Leakage Current
Noise in Receive Band
Harmonics
2fo
3fo, 4fo
Input Impedance
Coupling Factor
Directivity
Coupler IN_OUT
Daisy Chain Insertion Loss
Spurious Output Level
(all spurious outputs)
Load mismatch stress with no
permanent degradation or failure
%
mA
mA
mA
mA
A
dBm/Hz
through V
MODE
pins, V
MODE1,2
= +1.8 V
through V
EN
pin, V
EN
= +1.8 V
through V
BATT
pin, V
MODE1,2
= +1.8 V
V
BATT
= V
CC
= +4.35 V,
V
EN
= 0 V, V
MODE1,2
= 0 V
925 MHz to 960 MHz
P
OUT
+27.7
dBm
dBc
VSWR
dB
dB
dB
698 MHz to 2620 MHz
Pin 6-8, Shutdown Mode
P
OUT
+27.7
dBm
In-band load VSWR < 5:1
Out-of-band load VSWR < 10:1
Applies over all operating conditions
Applies over full operating range
-
-
-70
dBc
8:1
-
-
VSWR
Notes:
(1) ACLR and Efficiency measured at 897.5 MHz.
4
Data Sheet - Rev 2.3
03/2012
ANADIGICS [ ANADIGICS, INC ]
