March 2001
®
AS29LV800
Item
Description
The unlock bypass feature increases the speed at which the system programs bytes or words to the
device because it bypasses the first two unlock cycles of the standard program command sequence.
To initiate the unlock bypass command sequence, two unlock cycles must be written, then
followed by a third cycle which has the unlock bypass command, 20h.
Unlock Bypass
Command Sequence
The device then begins the unlock bypass mode. In order to program in this mode, a two cycle
unlock bypass program sequence is required. The first cycle has the unlock bypass program
command, A0h. It is followed by a second cycle which has the program address and data. To
program additional data, the same sequence must be followed.
The unlock bypass mode has two valid commands, the Unlock Bypass Program command and the
Unlock Bypass Reset command. The only way the system can exit the unlock bypass mode is by
issuing the unlock bypass reset command sequence. This sequence involves two cycles. The first
cycle contains the data, 90h. The second cycle contains the data 00h. Addresses are don’t care for
both cycles. The device then returns to reading array data.
Chip erase requires six bus cycles: two unlock write cycles; a setup command, two additional
unlock write cycles; and finally the Chip Erase command.
Chip Erase
Chip erase does not require logical 0s to be written prior to erasure. When the automated on-chip
erase algorithm is invoked with the Chip Erase command sequence, AS29LV800 automatically
programs and verifies the entire memory array for an all-zero pattern prior to erase. The 29LV800
returns to read mode upon completion of chip erase unless DQ5 is set high as a result of exceeding
time limit.
Sector erase requires six bus cycles: two unlock write cycles, a setup command, two additional
unlock write cycles, and finally the Sector Erase command. Identify the sector to be erased by
addressing any location in the sector. The address is latched on the falling edge of WE; the
command, 30h is latched on the rising edge of WE. The sector erase operation begins after a sector
erase time-out.
To erase multiple sectors, write the Sector Erase command to each of the addresses of sectors to
erase after following the six bus cycle operation above. Timing between writes of additional sectors
must be less than the erase time-out period, or the AS29LV800 ignores the command and erasure
begins. During the time-out period any falling edge of WE resets the time-out. Any command
(other than Sector Erase or Erase Suspend) during time-out period resets the AS29LV800 to read
mode, and the device ignores the sector erase command string. Erase such ignored sectors by
restarting the Sector Erase command on the ignored sectors.
The entire array need not be written with 0s prior to erasure. AS29LV800 writes 0s to the entire
sector prior to electrical erase; writing of 0s affects only selected sectors, leaving non-selected
sectors unaffected. AS29LV800 requires no CPU control or timing signals during sector erase
operations.
Automatic sector erase begins after sector erase time-out from the last rising edge of WE from the
sector erase command stream and ends when the DATA polling (DQ7) is logical 1. DATA polling
address must be performed on addresses that fall within the sectors being erased. AS29LV800
returns to read mode after sector erase unless DQ5 is set high by exceeding the time limit.
Sector Erase
3/22/01; V.1.0
Alliance Semiconductor
P. 8 of 25
ANADIGICS [ ANADIGICS, INC ]
