Low voltage, Low power, ±1% High detect accuracy with delay circuit CMOS Voltage Detector
Rev. E13-01
VDD Series
PRODUCTS NUMBERING GUIDE
VDD
Design version
Package form
Output type
A : T
OPR
= –40°C ~ +85°C
T : SOT-23
C : CMOS output
N : N-channel open drain output
S : 10msec~50msec
M : 50msec~200msec
L : 80msec~400msec
1 : ±1%
18 ~ 60 : Selectable with a step of 0.1V
in the range of 1.8V ~ 6.0V
e.g.) 18 : 1.8V
30 : 3.0V
Delay time
Detection accuracy rate
Detection voltage
PIN CONFIGURATION / MARKING SPECIFICATION (SOT-23)
Pin Configuration
Vin
3
No.
1
2
Symbol
V
OUT
V
SS
V
IN
Output
Descriptions
Power ground
Voltage input
A B C D E
F F F F
3
Marking Specification
1
Vout
2
Vss
Code
A
BC
D
E
F
Mark
C or N
18~60
S, M or L
A
Internal rule
Contents
Output type
Detection voltage
Delay time
Version
Lot number
(Top view)
AnaSem
2
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