Low voltage, Low power, ±1% High detect accuracy with delay circuit CMOS Voltage Detector
Rev. E13-01
VDD Series
TYPICAL APPLICATION CIRCUITS
CMOS output
N-channel open drain output
V
OUT
V
IN
V
SS
100KΩ
V
IN
V
OUT
V
SS
BLOCK DIAGRAM
CMOS output
V
IN
V
IN
N-channel open drain output
+
Voltage
Reference
_
Delay
circuit
V
OUT
Voltage
Reference
+
_
Delay circuit
V
OUT
Vss
Vss
ABSOLUTE MAXIMUM RATINGS
Items
Input voltage range
Output current
Output voltage range
Power dissipation
※1)
SOT-23
Symbol
V
IN
I
OUT
V
OUT
P
D
T
OPR
T
STG
Ratings
–0.3 ~ +7.0
50
V
SS
–0.3 ~ V
IN
+0.3
400
–40 ~ +85
–55 ~ +125
Unit
V
mA
V
mW
°C
°C
Operating temperature range
Storage temperature range
Note :
※1)
Power dissipation depends on conditions of mounting on boards.
PCB dimension is 50mm×50mm×1.6mm.
AnaSem
3
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