APW7066
Electrical Characteristics (Cont.)
Operating Conditions: V
CC
= 5V, V
CC12
= 12V, T
A
= 0 to 70
°
C, Unless Otherwise Specified.
Parameter
INPUT SUPPLY POWER
VCC Rising
Power-On Reset Threshold
VCC Falling
VCC12 Rising
VCC12 Falling
4.15
3.9
7.55
7.1
4.23
4.0
7.8
7.3
4.4
4.15
8
7.55
V
V
V
V
Test Conditions
Min.
Typ.
Max.
Units
SYSTEM ACCURACY
Outputs 1 and 3 Reference
Voltage
Output 2 Reference Voltage
Outputs 1 and 2 System Accuracy
Output 3 System Accuracy
OSCILLATOR
Accuracy
Frequency
Adjustment Range
FS/SYNC pin open
FS/SYNC pin: resistor to GND;
resistor to VCC12
0.6
3.3V
-0.8
-0.8
-20
240
70
2.1
0
85
15
4
2
VCC
-50
45
3.3
85
300
0.8
0.8
20
360
800
V
%
%
%
KHz
KHz
V
%
dB
MHz
V/
µ
s
mV
V
mA
mA
Sawtooth Amplitude
Duty-Cycle Range
ERROR AMPLIFIER (OUT1 and OUT2)
Open-Loop Gain
RL = 10kΩ to ground
Open-Loop Bandwidth
CL = 100pF, RL = 10kΩ to ground
Slew Rate
CL = 100pF, RL = 10k
Ω
to ground
EA Offset
COMP1/2 to FB1/2; compare to
internal VREF/REFIN
Maximum Output Voltage
RL = 10kΩ to ground; (may trip
short-circuit)
Output High Source Current
COMP1/2, VCOMP=2V
Output Low Sink Current
COMP1/2, VCOMP=2V
PROTECTION AND MONITOR
Under-Voltage Threshold
Causes PGOOD to go low; if there
(COMP1 and COMP2)
for a filter time, implies the COMP
pin(s) is out-of-range, and shuts
down IC
Based on internal oscillator clock
UV filter time
frequency (nominal 300kHz = 3.3µs
clock period)
PGOOD Low Voltage
IPGOOD = 2mA
LINEAR REGULATOR (OUT3)
DRIVE3 to FB3; compare to internal
EA Offset
VREF
DRIVE3 High Output Voltage
Copyright
©
ANPEC Electronics Corp.
Rev. A.4 - Jun., 2005
5
V
1
0.1
2
0.3
Clock
pulses
V
2
VCC12
mV
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ANPEC [ ANPEC ELECTRONICS COROPRATION ]
