APW7068
Application Information (Cont.)
Linear Regulator Input/Output Capacitor Selection
loop. A compensation network among COMP, FB and
VOUT1 should be added. The compensation network is
shown in Fig. 9. The output LC filter consists of the
output inductor and output capacitors. The transfer
function of the LC filter is given by:
The input capacitor is chosen based on its voltage
rating. Under load transient condition, the input
capacitor will momentarily supply the required transient
current. The output capacitor for the linear regulator is
chosen to minimize any droop during load transient
condition. In addition, the capacitor is chosen based
on its voltage rating.
1+ s´ ESR´ COUT1
GAINLC
=
s2 ´ L´ COUT1 + s´ ESR´ COUT1 +1
The poles and zero of this transfer functions are:
Linear Regulator Input/Output MOSFET Selection
The maximum DRIVE voltage is about 10V when
VCC12 is equal 12V. Since this pin drives an external
N-channel MOSFET, therefore the maximum output
voltage of the linear regulator is dependent upon the
1
FLC
=
2 ´ p ´ L ´ COUT1
1
FESR
=
2 ´ p ´ ESR ´ COUT1
VGS.
= 10 - VGS
The FLC is the double poles of the LC filter, and FESR is
the zero introduced by the ESR of the output capacitor.
VOUT2MAX
Another criterion is its efficiency of heat removal. The
power dissipated by the MOSFET is given by:
PHASE
L
OUTPUT1
Pd = IOUT2 x (VIN – VOUT2
)
COUT1
Where IOUT2 is the maximum load current, VOUT2 is the
nominal output voltage.
ESR
In some applications, heatsink might be required to
help maintain the junction temperature of the MOSFET
below its maximum rating.
Figure 6. The Output LC Filter
Linear Regulator Compensation Selection
FLC
The linear regulator is stable over all loads current.
However, thetransientresponsecanbefurtherenhanced
by connecting a RC network between the FBL and
DRIVE pin. Depending on the output capacitance and
load current of the application, the value of this RC
network is then varied.
-40dB/dec
FESR
-20dB/dec
PWM Compensation
The output LC filter of a step down converter introduces
a double pole, which contributes with -40dB/decade
gain slope and 180 degrees phase shift in the control
Frequency(Hz)
Figure 7. The LC Filter GAIN and Frequency
Copyright ã ANPEC Electronics Corp.
15
www.anpec.com.tw
Rev. A.2 - Jun., 2006
ANPEC [ ANPEC ELECTRONICS COROPRATION ]
