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ATF16V8B-15PC 参数 Datasheet PDF下载

ATF16V8B-15PC图片预览
型号: ATF16V8B-15PC
PDF下载: 下载PDF文件 查看货源
内容描述: 高性能EE PLD [Highperformance EE PLD]
分类和应用:
文件页数/大小: 26 页 / 627 K
品牌: ATMEL [ ATMEL CORPORATION ]
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11.1
ATF16V8B Registered Mode
PAL Device Emulation/PAL Replacement.
The registered mode is used if one or more regis-
ters are required. Each macrocell can be configured as either a registered or combinatorial
output or I/O, or as an input. For a registered output or I/O, the output is enabled by the OE pin,
and the register is clocked by the CLK pin. Eight product terms are allocated to the sum term.
For a combinatorial output or I/O, the output enable is controlled by a product term, and seven
product terms are allocated to the sum term. When the macrocell is configured as an input, the
output enable is permanently disabled.
Any register usage will make the compiler select this mode. The following registered devices
can be emulated using this mode:
16R8
16R6
16R4
16RP8
16RP6
16RP4
Figure 11-1.
Registered Configuration for Registered Mode
Notes:
1. Pin 1 controls common CLK for the registered outputs. Pin 11 controls common OE for the reg-
istered outputs. Pin 1 and Pin 11 are permanently configured as CLK and OE.
2. The development software configures all the architecture control bits and checks for proper pin
usage automatically.
Figure 11-2.
Combinatorial Configuration for Registered Mode
Notes:
1. Pin 1 and Pin 11 are permanently configured as CLK and OE.
2. The development software configures all the architecture control bits and checks for proper pin
usage automatically.
10
ATF16V8B/BQ/BQL
0364J–PLD–7/05