PRELIMINARY
SPECIFICATION
Austin Semiconductor, Inc.
WE\, CE\ Pin Operation
During a write cycle, address are latched by the falling edge
of WE\ or CE\, and data is latched by the rising edge of WE\
or CE\.
Write/Erase Endurance and Data Retention Time
The endurance is 10
4
cycles in case of the page programming
and 10
3
cycles in case of the byte programming (1% cumula-
tive failure rate). The data retention time is more than 10
years when a device is page-programmed less than 10
4
cycles.
EEPROM
AS8ERLC128K32
may act as a trigger and turn the EEPROM to programming
mode by mistake. To prevent this phenomenon, this device has
a noise cancellation function that cuts noise if its width is 20ns
or less in program mode.
Be careful not to allow noise of a width more than
20ns on the control pins. See Diagram 1 below.
2.
Data Protection at V
CC
On/Off
When V
CC
is turned on or off, noise on the control
pins generated by external circuits (CPU, etc.) may act as a
trigger and turn the EEPROM to program mode by mistake.
To prevent this unintentional programming, the EEPROM must
be kept in an unprogrammable state while the CPR is in an
unstable state.
NOTE: The EEPROM should be kept in
unprogrammable state during V
CC
on/off by using CPU RE-
SET signal. See the timing diagram below.
RDY/Busy\ SIGNAL
RDY/Busy\ signal also allows status of the EEPROM to
be determined. The RDY/Busy\ signal has high impedance
except in write cycle and is lowered to V
OL
after the first write
signal. At the end of the write cycle, the RDY/Busy\ signal
changes state to high impedance. This allows many
AS8ERLC128K32 devices RDY/Busy\ signal lines to be wired-
OR together.
DIAGRAM 1
PROGRAMMING/ERASE
The AS8ERLC128K32 does
NOT
employ a BULK-erase
function. The memory cells can be programmed ‘0’ or ‘1’. A
write cycle performs the function of erase & write on every
cycle with the erase being transparent to the user. The internal
erase data state is considered to be ‘1’. To program the memory
array with background of ALL 0’s or All 1’s, the user would
program this data using the page mode write operation to pro-
gram all 1024 128-byte pages.
Data Protection
1.
Data Protection against Noise on Control Pins (CE\,
OE\, WE\) During Operation
During readout or standby, noise on the control pins
DATA PROTECTION AT V
CC
ON/OFF
V
CC
CPU
RESET
*Unprogrammable
*Unprogrammable
AS8ERLC128K32
Rev. 1.9 06/06
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
11
AUSTIN [ AUSTIN SEMICONDUCTOR ]
