SRAM
Austin Semiconductor, Inc.
WRITE CYCLE NO. 1
12
(Chip Enabled Controlled)
WC
tWC
MT5C1005
t
ADDRESS
t
AW
tAW
t
AS
tAS
CE\
WE\
t
CW
tCW
t
WP
tWP1
t
DS
tDS
AH
tAH
t
D
Q
DATA VAILD
HIGH Z
WRITE CYCLE NO. 2
7, 12
(Write Enabled Controlled)
t
WC
tWC
ADDRESS
t
AW
tAW
t
CW
tCW
t
AH
tAH
CE\
tAS
t
AS
WE\
t
WP
tWP1
t
DS
t
DH
tDH
D
Q
HIGH-Z
DATA VALID
NOTE:
Output enable (OE\) is inactive (HIGH).
MT5C1005
Rev. 3.2 06/05
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
7
2
32109876543210987654321
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1
1
321098765432109876543211
1
32109876543210987654321
098765432121098765432109876543210987654321
1
1
1
1
098765432121098765432109876543210987654321
1
t
DH
tDH
5
3
21
4
43
21
4321
3 1
4321
4 2
54321
54321
54321
2109876543210987654321
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1
1
2109876543210987654321
1
1
1
11
21
17
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DON’T CARE
UNDEFINED
AUSTIN [ AUSTIN SEMICONDUCTOR ]
