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MT5C2568 参数 Datasheet PDF下载

MT5C2568图片预览
型号: MT5C2568
PDF下载: 下载PDF文件 查看货源
内容描述: 32K ×8 SRAM SRAM存储器阵列 [32K x 8 SRAM SRAM MEMORY ARRAY]
分类和应用: 存储静态存储器
文件页数/大小: 16 页 / 141 K
品牌: AUSTIN [ AUSTIN SEMICONDUCTOR ]
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Austin Semiconductor, Inc.
MT5C2568
AS5C2568
SRAM
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS
(Note 5) (-55
o
C < T
C
< 125
o
C or -40
o
C to +85
o
C; V
CC
= 5.0V +10%)
DESCRIPTION
READ CYCLE
READ cycle time
Address access time
Chip enable access time
Output hold from address change
Chip enable to output in Low-Z
Chip disable to output in High-Z
Output enable to access time
Output enable to output in Low-Z
SYM
t
RC
t
AA
t
ACE
t
OH
t
LZCE
t
HZCE
t
AOE
t
LZOE
0
7
12
10
10
0
2
10
8
0
0
7
15
12
12
0
0
12
10
0
0
10
2
2
7
6
0
10
20
15
15
0
0
15
10
0
0
10
-12
-15
-20
MIN MAX MIN MAX MIN MAX
12
12
12
3
3
10
8
0
10
25
20
20
0
0
20
15
0
3
15
15
15
15
3
3
10
10
0
15
35
30
30
0
0
30
20
0
3
35
20
20
20
3
3
15
15
2
35
45
40
40
0
0
40
20
3
3
20
-25
MIN MAX
25
25
25
3
3
35
20
0
20
-35
MIN MAX
35
35
35
3
3
20
20
-45
MIN MAX
45
45
45
UNITS NOTES
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
7
6, 7
6
7
6, 7
Output disable to output in High-Z t
HZOE
WRITE CYCLE
WRITE cycle time
t
WC
Chip enable to end of write
Address valid to end of write
Address setup time
Address hold from end of write
WRITE pulse width
Data setup time
Data hold time
Write disable to output in Low-Z
Write enable to output in High-Z
t
CW
t
AW
t
AS
t
AH
t
WP
t
DS
t
DH
t
LZWE
t
HZWE
MT5C2568 / AS5C2568
Rev. 4.5 06/05
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
4