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ADNS-5020-EN 参数 Datasheet PDF下载

ADNS-5020-EN图片预览
型号: ADNS-5020-EN
PDF下载: 下载PDF文件 查看货源
内容描述: 光学鼠标传感器 [Optical Mouse Sensor]
分类和应用: 传感器
文件页数/大小: 24 页 / 330 K
品牌: AVAGO [ AVAGO TECHNOLOGIES LIMITED ]
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LED Mode
For power savings, the LED will not be continuously on.
ADNS-5020-EN will pulse the LED only when needed.
Chip Select Operation
The serial port is activated after NCS goes low. If NCS
is raised during a transaction, the entire transaction
is aborted and the serial port will be reset. This is true
for all transactions. After a transaction is aborted, the
normal address-to-data or transaction-to-transaction
delay is still required before beginning the next trans-
action. To improve communication reliability, all serial
transactions should be framed by NCS. In other words,
the port should not remain enabled during periods of
non-use because ESD and EFT/B events could be inter-
preted as serial communication and put the chip into an
unknown state. In addition, NCS must be raised after
each burst-mode transaction is complete to terminate
burst-mode. The port is not available for further use until
burst-mode is terminated.
Synchronous Serial Port
The synchronous serial port is used to set and read
parameters in the ADNS-5020-EN, and to read out the
motion information.
The port is a three wire serial port. The host micro-con-
troller always initiates communication; the ADNS-5020-EN
never initiates data transfers. SCLK, SDIO, and NCS may be
driven directly by a micro-controller. The port pins may be
shared with other SPI slave devices. When the NCS pin is
high, the inputs are ignored and the output is tri-stated.
The lines that comprise the SPI port:
SCLK:
SDIO:
NCS:
Clock input. It is always generated by the master
(the micro-controller).
Input and Output data.
Chip select input (active low). NCS needs to be
low to activate the serial port; otherwise, SDIO
will be high Z, and SDIO & SCLK will be ignored.
NCS can also be used to reset the serial port in
case of an error.
Write Operation
Write operation, defined as data going from the micro-
controller to the ADNS-5020-EN, is always initiated by
the micro-controller and consists of two bytes. The first
byte contains the address (seven bits) and has a “1” as its
MSB to indicate data direction. The second byte contains
the data. The ADNS-5020-EN reads SDIO on rising edges
of SCLK.
NCS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
1
2
SCLK
SDIO
1
A6
A5
A4
A3
A2
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
1
A6
SDIO DRIVEN BY MICRO-CONTROLLER
Write Operation
1/f
SCLK
1/f
SCLK
SCLK
SDIO
t
hold
t
setup
SDIO Setup and Hold Time
11