ADS1210 SIMPLIFIED BLOCK DIAGRAM
AGND
3
AV
DD
16
REF
OUT
17
+2.5V
Reference
REF
IN
18
V
BIAS
4
+3.3V Bias
Generator
X
IN
7
X
OUT
8
Clock Generator
9
10
1
2
PGA
Micro Controller
Second-Order
∆Σ
Modulator
Third-Order
Digital Filter
Instruction Register
Command Register
Data Output Register
Offset Register
Full-Scale Register
11
Modulator Control
Serial Interface
6
DSYNC
5
CS
15
MODE
14
DRDY
12
13
SCLK
SDIO
SDOUT
DGND
DV
DD
A
IN
P
A
IN
N
ADS1210 PIN CONFIGURATION
TOP VIEW
DIP/SOIC
ADS1210 PIN DEFINITIONS
PIN NO
1
2
3
NAME
A
IN
P
A
IN
N
AGND
V
BIAS
CS
DSYNC
X
IN
X
OUT
DGND
DV
DD
SCLK
SDIO
SDOUT
DRDY
MODE
AV
DD
REF
OUT
REF
IN
DESCRIPTION
Noninverting Input.
Inverting Input.
Analog Ground.
Bias Voltage Output, +3.3V nominal.
Chip Select Input.
Control Input to Synchronize Serial Output Data.
System Clock Input.
System Clock Output (for Crystal or Resonator).
Digital Ground.
Digital Supply, +5V nominal.
Clock Input/Output for serial data transfer.
Serial Data Input (can also function as Serial Data
Output).
Serial Data Output.
Data Ready.
SCLK Control Input (Master = 1, Slave = 0).
Analog Supply, +5V nominal.
Reference Output, +2.5V nominal.
Reference Input.
A
IN
P
A
IN
N
AGND
V
BIAS
CS
DSYNC
X
IN
X
OUT
DGND
1
2
3
4
5
6
7
8
9
ADS1210
18 REF
IN
17 REF
OUT
16 AV
DD
15 MODE
14 DRDY
13 SDOUT
12 SDIO
4
5
6
7
8
9
10
11
12
13
11 SCLK
10 DV
DD
14
15
16
17
18
®
ADS1210, 1211
4
BURR-BROWN [ BURR-BROWN CORPORATION ]
