OPERATIONAL CONTROL
PCM1717 can be controlled in two modes. Software Mode
allows the user to control operation with a 16-bit serial
register. Hardware Mode allows the user to hard-wire opera-
tion of PCM1717 using four parallel wires. The MODE pin
determines which mode PCM1717 is in; a LOW level on pin
14 places PCM1717 in Hardware Mode, and a HIGH on pin
14 places PCM1717 in Software Mode.
MODE (Pin 14)
“HIGH”
“LOW”
Selected Mode
Software Mode
Hardware Mode
Pin 16
MD
DM0
Pin 17
MC
DM1
Pin 18
ML
MUTE
DIGITAL DE-EMPHASIS (Pins 16 and 17)
Pins 16 and 17 are used as a two-bit parallel register to
control de-emphasis modes:
PIN 16
0
1
0
1
PIN 17
0
0
1
1
MODE
De-emphasis
De-emphasis
De-emphasis
De-emphasis
disabled
enabled at 48kHz
enabled at 44.1kHz
enabled at 32kHz
Table I indicates which functions are selectable within the
user’s chosen mode. All of the functions shown are select-
able in the Software Mode, but only soft mute and de-
emphasis control may be selected in the Hardware Mode.
RESET MODE (Pin 15)
A LOW level on pin 15 will force the digital filters, modu-
lators and mode controls into a reset (disable) mode. While
this pin is held low, the output of PCM1717 will be forced
to V
CC
/2 (Bipolar Zero). Bringing pin 15 HIGH will initial-
ize all DAC functions, and allow for normal operation.
SOFTWARE MODE
(Pin 14 = “1”)
The Software Mode uses a three-wire interface on pins 16,
17 and 18. Pin 17 (MC) is used to clock in the serial control
data, pin 18 (ML) is used to synchronize the serial control
data, and pin 16 (MD) is used to latch in the serial control
register. There are four distinct registers, with bits 9 and 10
(of 16) determining which register is in use.
REGISTER CONTROL (Bits 9, 10)
FUNCTION
Input Data Format
Normal Format
I
2
S Format
Input Resolution
16 Bits
18 Bits
LRCIN Polarity
L/R = High/Low
L/R = Low/High
De-emphasis Control
32kHz
44.1kHz
48kHz
OFF
Soft Mute
Digital Attenuation
Analog Output Mode
Infinite Zero Detection
DAC Operation Control
SOFTWARE
HARDWARE
MODE
DEFAULT
MODE
DEFAULT
SELECTABLE
SELECTABLE
Yes
Normal
Yes
16 Bits
Yes
L/R = H/L
Yes
OFF
No
Normal Only
No
16 Bits Only
No
L/R = H/L
Only
Yes
OFF
Normal
16 Bits
L/R = H/L
REGISTER
0
1
2
3
B9 (A0)
0
1
0
1
B10 (A1)
0
0
1
1
Yes
Yes
Yes
Yes
Yes
OFF
0dB
Stereo
Disabled
ON
Yes
No
No
No
No
OFF
0dB
Stereo
Disabled
ON
TABLE I. Feature Selections by Mode.
Control data timing is shown in Figure 6. ML is used to latch
the data from the control registers. After each register’s
contents are checked in, ML should be taken low to latch in
the data. A “res” in the register indicates that location is
reserved for factory use. When loading the registers, the
“res” bits should be set LOW.
REGISTER 0
B15 B14 B13 B12 B11 B10 B9 B8
B7 B6 B5 B4 B3 B2 B1 B0
res res res res res A1 A0 LDL AL7 AL6 AL5 AL4 AL3 AL2 AL1 AL0
HARDWARE MODE
(Pin 14 = “0”)
This mode is controlled by logic levels present on pins 15,
16, 17 and 18. Hardware Mode allows for control of soft
mute, digital de-emphasis and disable ONLY. Other func-
tions such as attenuation, I/O format and infinite zero detect
can only be controlled in the Software Mode.
SOFT MUTE (Pin 18)
A LOW level on pin 18 will force both channels to be muted;
a HIGH level on pin 18 will allow for normal operation.
Register 0 is used to control left channel attenuation. Bits
0-7 (AL0-AL7) are used to determine the attenuation level.
The level of attenuation is given by:
ATT = [20log
10
(ATT_DATA/255)] dB
®
PCM1717
8
BURR-BROWN [ BURR-BROWN CORPORATION ]
