PGA2311
www.ti.com
SBOS218A – DECEMBER 2001 – REVISED JUNE 2002
PIN CONFIGURATION
Top View
DIP, SOL
PIN ASSIGNMENTS
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
NAME
ZCEN
CS
SDI
VD+
DGND
SCLK
SDO
MUTE
VINR
AGNDR
VOUTR
VA+
VA–
VOUTL
AGNDL
VINL
FUNCTION
Zero Crossing Enable Input (Active HIGH)
Chip Select Input (Active LOW)
Serial Data input
Digital Power Supply, +5V
Digital Ground
Serial Clock Input
Serial Data Output
Mute Control Input (Active LOW)
Analog Input, Right Channel
Analog Ground, Right Channel
Analog Output, Right Channel
Analog Power Supply, +5V
Analog Power Supply, –5V
Analog Output, Left Channel
Analog Ground, Left Channel
Analog Input, Left Channel
4