PGA2311
www.ti.com
SBOS218A – DECEMBER 2001 – REVISED JUNE 2002
GENERAL DESCRIPTION
The PGA2311 is a stereo audio volume control. It may
be used in a wide array of professional and consumer
audio equipment. The PGA2311 is fabricated in a sub–
micron CMOS process.
The heart of the PGA2311 is a resistor network, an ana-
log switch array, and a high–performance op amp
stage. The switches are used to select taps in the resis-
tor network that, in turn, determine the gain of the am-
plifier stage. Switch selections are programmed using
a serial control port. The serial port allows connection
to a wide variety of host controllers. Figure 1 shows a
functional block diagram of the PGA2311.
If during normal operation the power supply voltage
drops below
±3.2V,
the circuit enters a hardware MUTE
state. A power-up sequence will be initiated if the power
supply voltage returns to greater than
±3.2V.
ANALOG INPUTS AND OUTPUTS
The PGA2311 includes two independent channels, re-
ferred to as the left and right channels. Each channel has
a corresponding input and output pin. The input and out-
put pins are unbalanced, or referenced to analog ground
(either AGNDR or AGNDL). The inputs are named V
IN
R
(pin 9) and V
IN
L (pin 16), while the outputs are named
V
OUT
R (pin 11) and V
OUT
L (pin 14).
The input and output pins may swing within 1.25V of the
analog power supplies, V
A
+ (pin 12) and V
A
– (pin 13).
Given V
A
+ = +5V and V
A
– = –5V, the maximum input or
output voltage range is 7.5Vp-p.
For optimal performance, it is best to drive the PGA2311
with a low source impedance. A source impedance of
600Ω or less is recommended. Source impedances up
to 2kΩ will cause minimal degradation of THD+N. Please
refer to the “THD+N vs Source Impedance” plot in the
Typical Characteristics section of the datasheet.
POWER–UP STATE
On power up, “power–up reset” is activated for about
100ms during which the circuit is in hardware MUTE
state and all internal flip-flops are reset. At the end of this
period, the offset calibration is initiated without any exter-
nal signals. Once this has been completed, the gain byte
value for both the left and right channels are set to 00
HEX
,
or the software MUTE condition. The gain will remain at
this setting until the host controller programs new set-
tings for for each channel via the serial control port.
Figure 1. PGA2311 Block Diagram.
7
BURR-BROWN [ BURR-BROWN CORPORATION ]
