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TISP6NTP2CDR-S 参数 Datasheet PDF下载

TISP6NTP2CDR-S图片预览
型号: TISP6NTP2CDR-S
PDF下载: 下载PDF文件 查看货源
内容描述: 高压振铃SLIC保护 [High Voltage Ringing SLIC Protector]
分类和应用: 高压
文件页数/大小: 9 页 / 271 K
品牌: BOURNS [ BOURNS ELECTRONIC SOLUTIONS ]
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TISP6NTP2C High Voltage Ringing SLIC Protector
Electrical Characteristics, 0
°C
TJ
70
°C
(Unless Otherwise Noted)
Parameter
I
D
V
(BO)
V
(BO)
V
GK(BO)
V
F
V
FRM
V
FRM
I
H
I
GKS
I
GT
V
GT
C
KA
Off-state current
Ramp breakover
voltage
Impulse breakover
voltage
Gate-cathode impulse
breakover voltage
Forward voltage
Ramp peak forward
recovery voltage
Impulse peak forward
recovery voltage
Holding current
Gate reverse current
V
D
= V
DRM
, V
GK
= 0
UL 497B, dv/dt
≤±100
V/µs, di/dt =
±10
A/µs,
V
GG
= -100 V, Maximum ramp value =
±10
A
(see Note 3)
2/10
µs,
I
TM
= -27 A, di/dt = -27 A/µs, R
S
= 50
Ω,
V
GG
= -100 V,
(see Note 3)
I
F
= 5 A, t
w
= 200
µs
UL 497B, dv/dt
≤±100
V/µs, di/dt =
±10
A/µs,
Maximum ramp value =
±10
A
2/10
µs,
I
TM
= -27 A, di/dt = -27 A/µs, R
S
= 50
Ω,
(see Note 3)
I
T
= -1 A, di/dt = 1A/ms, V
GG
= -100 V
V
GG
= V
GK
= V
GKRM
, V
KA
= 0
I
T
= -3 A, t
p(g)
20
µs,
V
GG
= -100 V
I
T
= -3 A, t
p(g)
20
µs,
V
GG
= -100 V
f = 1 MHz, V
d
= 1 V, I
G
= 0, (see Note 4)
V
D
= -3 V
V
D
= -48 V
T
J
= 25
°C
T
J
= 25
°C
-150
-5
-50
5
6
2.5
100
50
T
J
= 25
°C
Test Conditions
T
J
= 25
°C
Min
Typ
Max
-5
-50
T
J
= 25
°C
-112
-115
15
3
5
12
Unit
µA
µA
V
V
V
V
V
V
mA
µA
µA
mA
mA
V
pF
pF
2/10
µs,
I
TM
= -27 A, di/dt = -27 A/µs, R
S
= 50
Ω,
V
GG
= -100 V,
Gate trigger current
Gate-cathode trigger
voltage
Cathode-anode off-
state capacitance
NOTES: 3. GR-1089-CORE intra-building 2/10, 1.5 kV conditions with 20 MHz bandwidth. The diode forward recovery and the thyristor gate
impulse breakover (overshoot) are not strongly dependent of the SLIC supply voltage value (V
GG
).
4. These capacitance measurements employ a three terminal capacitance bridge incorporating a guard circuit. The unmeasured
device terminals are a.c. connected to the guard terminal of the bridge.
Thermal Characteristics
Parameter
R
θJA
Junction to free air thermal resistance
Test Conditions
T
A
= 70
°C,
EIA/JESD51-3 PCB,
EIA/JESD51-2 environment, P
tot
= 0.52 W
Min
Typ
Max
160
Unit
°C/W
MARCH 2002 – REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.