TISP6NTP2C High Voltage Ringing SLIC Protector
APPLICATIONS INFORMATION
SLIC Protection
The generation of POTS lines at the customer premise normally uses a ringing SLIC. Although the lines are short, a central office ringing
voltage level is often required for fax machine operation. High voltage SLICs are now available that can produce adequate ringing voltage (see
table). The TISP6NTP2C has been designed to work with these SLICs which use battery voltages, V
BATH
, down to -150 V. Figure 2 shows a
typical example with one TISP6NTP2C protecting two SLICs.
The table below shows some details of HV SLICs using multiple negative supply rails.
Manufacturer
SLIC Series
SLIC #
Data Sheet Issue
Short Circuit Current
V
BATH
max.
V
BATL
max.
AC Ringing for:
Crest Factor
V
BATH
V
BATR
R or T Overshoot < 250 ns
Line Feed Resistance
20 + 30
INFINEON‡
SLIC-P‡
PEB 4266
14/02/2001
110
-155
-150
85
1.4
-70
-150
-15
50
ISLIC™‡
79R241
-/08/2000
150
-104
-104
45†
1.4
-90
-36
15
-20
50
79R101
-/07/2000
150
-104
V
BATH
50†
1.4
-99
-24
12
-20
50
79R100
-/07/2000
150
-104
V
BATH
55†
1.25
-99
-24
12
V
V
V
Ω
mA
V
V
V rms
LEGERITY™‡
Unit
† Assumes -20 V battery voltage during ringing.
‡ Legerity, the Legerity logo and ISLIC are the trademarks of Legerity, Inc.
Other product names used in this publication are for identification purposes only and may be trademarks of their respective
companies .
ISDN Protection
For voltage feed protection, the cathodes of an TISP6NTP2C thyristors are connected to the four conductors to be protected (see Figure 3).
Each gate is connected to the appropriate negative voltage feed. The anode of the TISP6NTP2C is connected to the system common.
Positive overvoltages are clipped to common by forward conduction of the TISP6NTP2C antiparallel diode. Negative overvoltages are initially
clipped close to the negative supply by emitter follower action of the TISP6NTP2C buffer transistor. If sufficient clipping current flows, the
TISP6NTP2C thyristor will regenerate and switch into a low voltage on-state condition. As the negative overvoltage subsides, the high holding
current of the TISP6NTP2C prevents d.c. latchup.
Voltage Stress Levels
Figure 4 shows the protector electrodes. The package terminal designated gate, G, is the transistor base, B, electrode connection and so is
marked as B (G). The following junctions are subject to voltage stress: Transistor EB and CB, SCR AK (off state) and the antiparallel diode
(reverse blocking). This clause covers the necessary testing to ensure the junctions are good.
Testing transistor CB and EB: The maximum voltage stress level for the TISP6NTP2C is V
BATH
with the addition of the short term antiparallel
diode voltage overshoot, V
FRM
. The current flowing out of the G terminal is measured at V
BATH
plus V
FRM
. The SCR K terminal is shorted to the
common (0 V) for this test (see Figure 4). The measured current, I
GKS
, is the sum of the junction currents I
CB
and I
EB
.
Testing transistor CB, SCR AK off state and diode reverse blocking: The highest AK voltage occurs during the overshoot period of the
protector. To make sure that the SCR and diode blocking junctions do not break down during this period, a d.c. test for off-state current, I
D
,
can be applied at the overshoot voltage value. To avoid transistor CB current amplification by the transistor gain, the transistor base-emitter is
shorted during this test (see Figure 5).
Summary: Two tests are need to verify the protector junctions. Maximum current values for I
GKS
and I
D
are required at the specified applied
voltage conditions.
MARCH 2002 – REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
BOURNS [ BOURNS ELECTRONIC SOLUTIONS ]
