BS62UV2006
BSI
AC TEST CONDITIONS
(Test Load and Input/Output Reference)
KEY TO SWITCHING WAVEFORMS
WAVEFORM
INPUTS
OUTPUTS
Input Pulse Levels
Vcc / 0V
MUST BE
STEADY
MUST BE
STEADY
Input Rise and Fall Times
1V/ns
MAY CHANGE
FROM H TO L
WILL BE
CHANGE
FROM H TO L
Input and Output
0.5Vcc
Timing Reference Level
MAY CHANGE
FROM L TO H
WILL BE
CHANGE
FROM L TO H
Output Load
CL = 100pF+1TTL
CL = 30pF+1TTL
,
DON T CARE:
CHANGE :
STATE
UNKNOWN
ANY CHANGE
PERMITTED
DOES NOT
APPLY
CENTER
LINE IS HIGH
IMPEDANCE
”OFF ”STATE
AC ELECTRICAL CHARACTERISTICS ( TA = -40oC to + 85oC)
READ CYCLE
JEDEC
PARAMETER
CYCLE TIME : 100ns
CYCLE TIME : 85ns
PARAMETER
(Vcc = 1.9~3.6V)
(Vcc = 1.9~3.6V)
DESCRIPTION
Read Cycle Time
UNIT
NAME
MIN. TYP. MAX.
MIN. TYP. MAX.
NAME
t
t
100
--
--
--
--
--
--
--
--
--
--
--
--
--
100
100
100
45
--
85
--
--
--
--
--
--
--
--
--
--
--
--
--
85
85
85
40
--
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
AVAX
RC
t
t
Address Access Time
AVQV
AA
t
t
Chip Select Access Time
--
--
(CE1)
(CE2)
E1LQV
ACS1
t
t
Chip Select Access Time
--
--
E2HOV
ACS2
t
t
Output Enable to Output Valid
Chip Select to Output Low Z
Chip Select to Output Low Z
Output Enable to Output in Low Z
Chip Deselect to Output in High Z
Chip Deselect to Output in High Z
Output Disable to Output in High Z
--
--
GLQV
OE
t
t
15
15
15
--
15
15
10
--
(CE1)
(CE2)
E1LQX
CLZ1
t
t
--
--
E2HOX
CLZ2
t
t
--
--
GLQX
OLZ
t
t
(CE1)
(CE2)
40
40
35
35
35
30
E1HQZ
CHZ1
t
t
--
--
E2HQZ
CHZ2
t
t
--
--
GHQZ
OHZ
t
t
Data Hold from Address Change
AXOX
OH
15
--
--
15
--
--
ns
Revision 1.1
Jan. 2004
R0201-BS62UV2006
4
BSI [ BRILLIANCE SEMICONDUCTOR ]
