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SPT9713BIP 参数 Datasheet PDF下载

SPT9713BIP图片预览
型号: SPT9713BIP
PDF下载: 下载PDF文件 查看货源
内容描述: 12 - BIT , 100 MWPS TTL D / A转换器 [12-BIT, 100 MWPS TTL D/A CONVERTER]
分类和应用: 转换器
文件页数/大小: 7 页 / 137 K
品牌: CADEKA [ CADEKA MICROCIRCUITS LLC. ]
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ABSOLUTE MAXIMUM RATINGS (Beyond which damage may occur)
1
25 °C
Supply Voltages
Positive Supply Voltage (V
CC
) ................................ +7 V
Negative Supply Voltage (V
EE
) .............................. –7 V
A/D Ground Voltage Differential ........................... 0.5 V
Input Voltages
Digital Input Voltage
(D1–D12, Latch Enable) ............................... 0 V to V
CC
Control Amp Input Voltage Range ............... 0 V to –4 V
Reference Input Voltage Range (V
REF
) ........ 0 V to V
EE
Output Currents
Internal Reference Output Current .................... 500 µA
Control Amplifier Output Current ..................... ±2.5 mA
Temperature
Operating Temperature .......................... –40 to +85 °C
Junction Temperature ...................................... +150 °C
Lead, Soldering (10 seconds) ......................... +300 °C
Storage ................................................ –65 to +150 °C
Note:
1. Operation at any Absolute Maximum Rating is not implied. See
Electrical Specifications for proper nominal applied conditions
in typical applications.
ELECTRICAL SPECIFICATIONS
T
A
= T
MIN
– T
MAX
, V
CC
= +5.0 V, V
EE
= –5.2 V, R
Set
= 7.5 kΩ, Control Amp In = Ref Out, V
OUT
= 0 V, unless otherwise specified.
PARAMETERS
DC Performance
Resolution
Differential Linearity
Differential Linearity
Integral Linearity
Integral Linearity
Output Capacitance
Gain Error
1
Gain Error Tempco
Zero-Scale Offset Error
Offset Drift Coefficient
Output Compliance Voltage
Equivalent Output Resistance
Dynamic Performance
Conversion Rate
Settling Time t
ST2
Output Propagation Delay t
D3
Glitch Energy
4
Full Scale Output Current
5
Spurious-Free Dynamic Range
6
1.23 MHz; 10 MWPS
5.055 MHz; 20 MWPS
10.1 MHz; 50 MWPS
16 MHz; 40 MWPS
Rise Time / Fall Time
1
Gain
TEST
CONDITIONS
TEST
LEVEL
SPT9713A
MIN TYP MAX
12
±0.5
SPT9713B
MIN TYP MAX
12
±1.0
±1.0
10
1.0
150
0.5
0.01
–1.2
0.8
100
1.0
+2.0
1.2
UNITS
Bits
LSB
LSB
LSB
LSB
pF
% FS
% FS
PPM/°C
µA
µA
µA/°C
V
kΩ
MWPS
ns
ns
pV-s
mA
dBc
dBc
dBc
dBc
ns
Max at Full Temp.
Best Fit
Max at Full Temp.
+25 °C
+25 °C
Full Temp.
Full Temp.
+25 °C
Full Temp.
Full Temp.
+25 °C
+25 °C
+25 °C
+25 °C
+25 °C
+25 °C
+25 °C
+25 °C
2 MHz Span
2 MHz Span
2 MHz Span
10 MHz Span
R
L
= 50
I
VI
I
VI
V
I
VI
V
I
VI
V
IV
IV
IV
V
V
V
V
V
V
V
V
V
–1.2
0.8
100
±0.75
±1.5
±0.75 ±1.0
±1.75
10
1.0
5.0
8.0
150
0.5
2.5
5.0
0.01
+2.0
1.0
1.2
±1.25
±2.0
±1.5
±2.0
5.0
8.0
2.5
5.0
13
2
15
20.48
70
68
68
68
2
13
2
15
20.48
70
68
68
68
2
is measured as a ratio of the full-scale current to I
Set
. The ratio
2
Measured as voltage at mid-scale transition to ±0.024%; R
L
=50
Ω.
4
Glitch is measured as the largest single transient.
is nominally 128.
3
Measured from the rising edge of Latch Enable to where the output signal has left a 1 LSB error band.
using I
FS
= 128 x (Control Amp In / R
Set
)
6
SFDR is defined as the difference in signal energy between the fundamental and worst case spurious frequencies in the output spectrum window,
which is centered at the fundamental frequency and covers the indicated span.
5
Calculated
SPT9713
2
2/15/01