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TMC2246AH5C1 参数 Datasheet PDF下载

TMC2246AH5C1图片预览
型号: TMC2246AH5C1
PDF下载: 下载PDF文件 查看货源
内容描述: 图像过滤器11 ×10位, 60 MHz的 [Image Filter 11 x 10 bit, 60 MHz]
分类和应用: 过滤器外围集成电路输入元件LTE时钟
文件页数/大小: 18 页 / 371 K
品牌: CADEKA [ CADEKA MICROCIRCUITS LLC. ]
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TMC2246A
PRODUCT SPECIFICATION
Pin Descriptions
Pin Number
Pin Name
Power
V
DD
GND
Clock
CLK
C3
1
System Clock.
The TMC2246A operates from a single master
clock input. The rising edge of clock strobes all enabled registers.
All timing specifications are referenced to the rising edge of CLK.
Data Input Ports.
D1 through D4 are the 10-bit data input ports.
The LSB is Dx
0
.
F3, H3, L7, C8
E3, G3, J3, L6,
H11, C7
12, 20, 46, 102
Supply Voltage.
The TMC2246A operates from a single +5V
supply. All power and ground pins must be connected.
8, 16, 24, 42,
72, 106
Ground.
The TMC2246A operates from a single +5V supply. All
power and ground pins must be connected.
CPGA/PPGA/
MPGA
MQFP
Pin Function Description
Inputs
D1
9-0
M1, K3, L2, N1, 27, 28, 29, 30,
L3, M2, N2, L4, 31, 32, 33, 34,
M3, N3
35, 36
J12, K13, J11, 70, 69, 68, 67,
K12, L13, L12, 66, 65, 64, 63,
K11, M13, M12,
62, 61
L11
J13, H12, H13, 71, 73, 74, 75,
G12, G11, G13, 76, 77, 78, 79,
F13, F12, F11,
80, 81
E13
B4, C5, A4, B5, 115, 114, 113,
A5, C6, B6, A6, 112, 111, 110,
A7, B7
109, 108, 107,
105
M4, L5, N4, M5, 37, 38, 39, 40,
N5, M6, N6, M7, 41, 43, 44, 45,
N7, N8, M8
47, 48, 49
N13, M11, L10, 60, 59, 58, 57,
N12, N11, M10, 56, 55, 54, 53,
L9, N10, M9,
52, 51, 50
N9, L8
E12, D13, E11,
D12, C13, B13,
D11, C12, A13,
C11, B12
82, 83, 84, 85,
86, 87, 88, 89,
90, 91, 92
D2
9-0
D3
9-0
D4
9-0
C1
10-0
Coefficient Input Ports.
C1 through C4 are the 11-bit coefficient
input ports. The LSB is Cx
0
.
C2
10-0
C3
10-0
C4
10-0
A8, B8, A9, B9, 104, 103, 101,
A10, C9, B10, 100, 99, 98, 97,
A11, B11, C10, 96, 95, 94, 93
A12
C1, D2, D1, E2, 6, 7, 9, 10, 11,
E1, F2, F1, G2, 13, 14, 15, 17,
G1, H1, H2, J1, 18, 19, 21, 22,
J2, K1, K2, L1
23, 25, 26
Sum Output.
The current 16-bit result is available at the Sum
output. The LSB is S
0
. See the Functional Block Diagram
.
Outputs
S
15-0
REV. 1.0.3 9/11/00
5