CM2021
PACKAGE / PINOUT DIAGRAM
TOP VIEW
5V_SUPPLY
3.3V_SUPPLY
GND
TMDS_D2+
TMDS_GND
NC
TMDS_D1+
TMDS_GND
NC
TMDS_D0+
TMDS_GND
NC
TMDS_CK+
TMDS_GND
NC
CE_REMOTE_IN
DDC_CLK_IN
DDC_DAT_IN
HOTPLUG_DET_IN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
NC
TMDS_BYP
GND
NC
TMDS_GND
TMDS_D2-
NC
TMDS_GND
TMDS_D1-
NC
TMDS_GND
TMDS_D0-
NC
TMDS_GND
TMDS_CK-
CE_REMOTE_OUT
DDC_CLK_OUT
DDC_DAT_OUT
HOTPLUG_DET_OUT
38-PIN TSSOP PACKAGE
Note: This drawing is not to scale.
PIN DESCRIPTIONS
PINS
37
NAME
TMDS_BYP
DESCRIPTION
This input pin is used to connect an optional external 0.1uF ceramic
bypass capacitor only to enhance the ESD protection level. Note: Do not
connect this pin to GND or any power rail.
TMDS 0.9pF ESD protection.
TMDS 0.9pF ESD protection.
TMDS 0.9pF ESD protection.
TMDS 0.9pF ESD protection.
TMDS 0.9pF ESD protection.
TMDS 0.9pF ESD protection.
TMDS 0.9pF ESD protection.
TMDS 0.9pF ESD protection.
3.3V_SUPPLY referenced logic level in.
5V_SUPPLY referenced logic level out plus 3.5pF ESD.
3.3V_SUPPLY referenced logic level in.
5V_SUPPLY referenced logic level out plus 3.5pF ESD.
3.3V_SUPPLY referenced logic level in.
5V_SUPPLY referenced logic level out plus 3.5pF ESD.
3.3V_SUPPLY referenced logic level in.
5V_SUPPLY referenced logic level out plus 3.5pF ESD.
Bias for CE / DDC / HOTPLUG level shifters.
Bias for CE / DDC / HOTPLUG level shifters plus current source for
5V_OUT.
No connect.
GND reference.
4
33
7
30
10
27
13
24
16
23
17
22
18
21
19
20
2
1
6, 9, 12, 15, 26, 29,
32, 35, 38
3, 5, 8, 11, 14, 25,
28, 31, 34, 36
TMDS_D2+
TMDS_D2-
TMDS_D1+
TMDS_D1-
TMDS_D0+
TMDS_D0-
TMDS_CK+
TMDS_CK-
CE_REMOTE_IN
CE_REMOTE_OUT
DDC_CLK_IN
DDC_CLK_OUT
DDC_DAT_IN
DDC_DAT_OUT
HOTPLUG_DET_IN
HOTPLUG_DET_OUT
3.3V_SUPPLY
5V_SUPPLY
NC
GND / TDMS_GND
©
2005 California Micro Devices Corp. All rights reserved.
2
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
●
Tel: 408.263.3214
●
Fax: 408.263.7846
●
www.calmicro.com
03/22/05