CAT1161, CAT1162
BLOCK DIAGRAM
EXTERNA LOAD
L
DOUT
ACK
VCC
GND
WORDADDRESS
BUFFERS
COLUMN
DECODERS
SENSEAMPS
SHIFT REGISTERS
RESET THRESHOLD OPTION
Part Dash
Number
-45
-42
-30
-28
XDEC
16K
EEPROM
Minimum
Threshold
4.50
4.25
3.00
2.85
2.55
Maximum
Threshold
4.75
4.50
3.15
3.00
2.70
SDA
START/STOP
LOGIC
-25
WP
CONTR
OL
LOGIC
DATA IN STORAGE
HIGHVOLTAGE/
TIMING CONTR
OL
RESET Controller
Only for
CAT1161
WATCHDOG
STATE COUNTERS
SLAVE
ADDRESS
COMPARATORS
SCL
Precision
Vcc Monitor
RESET RESET
ABSOLUTE MAXIMUM RATINGS
(1)
Parameters
Temperature Under Bias
Storage Temperature
Voltage on any Pin with Respect to Ground
V
CC
with Respect to Ground
Package Power Dissipation Capability (T
A
= 25°C)
Lead Soldering Temperature (10 secs)
Output Short Circuit Current
(3)
(2)
Ratings
–55 to +125
–65 to +150
–2.0 to V
CC
+ 2.0
–2.0 to 7.0
1.0
300
100
Units
ºC
ºC
V
V
W
ºC
mA
REABILITY CHARACTERISTICS
Symbol
N
END(4)
T
DR(4)
V
ZAP(4)
I
LTH(4)(5)
Parameter
Endurance
Data Retention
ESD Susceptibility
Latch-up
Reference Test Method
MIL-STD-883, Test Method 1033
MIL-STD-883, Test Method 1008
MIL-STD-883, Test Method 3015
JEDEC Standard 17
Min
1,000,000
100
2000
100
Max
Units
Cycles/Byte
Years
Volts
mA
Notes:
(1) Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions outside of those listed in the operational sections of this
specification is not implied. Exposure to any absolute maximum rating for extended periods may affect device performance and reliability.
(2) The minimum DC input voltage is –0.5V. During transitions, inputs may undershoot to –2.0V for periods of less than 20ns. Maximum DC
voltage on output pins is V
CC
+0.5V, which may overshoot to V
CC
+2.0V for periods of less than 20 ns.
(3) Output shorted for no more than one second. No more than one output shorted at a time.
(4) This parameter is tested initially and after a design or process change that affects the parameter.
(5) Latch-up protection is provided for stresses up to 100 mA on address and data pins from –1V to V
CC
+1V.
Doc. No. 3002 Rev. F
2
© 2007 Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
CATALYST [ CATALYST SEMICONDUCTOR ]
