CAT24C164
A.C. CHARACTERISTICS(1)
VCC = 1.8 V to 5.5 V, TA
= -40°C to 85°C.
Standard
Fast
Symbol
Parameter
Max
Max
Units
FSCL
Clock Frequency
100
400
kHz
tHD:STA
tLOW
START Condition Hold Time
Low Period of SCL Clock
High Period of SCL Clock
START Condition Setup Time
Data In Hold Time
4
4.7
4
0.6
1.3
0.6
0.6
0
μs
μs
μs
μs
μs
ns
ns
ns
μs
μs
μs
ns
ns
μs
μs
ms
ms
tHIGH
tSU:STA
tHD:DAT
tSU:DAT
tR
4.7
0
Data In Setup Time
250
100
SDA and SCL Rise Time
SDA and SCL Fall Time
STOP Condition Setup Time
Bus Free Time Between STOP and START
SCL Low to Data Out Valid
Data Out Hold Time
1000
300
300
300
(2)
tF
tSU:STO
tBUF
4
0.6
1.3
4.7
tAA
3.5
0.9
tDH
100
100
Ti(2)
Noise Pulse Filtered at SCL and SDA Inputs
WP Setup Time
100
100
tSU:WP
tHD:WP
tWR
0
0
WP Hold Time
2.5
2.5
Write Cycle Time
5
1
5
1
(2, 3)
tPU
Power-up to Ready Mode
Note:
(1) Test conditions according to “A.C. Test Conditions” table.
(2) Tested initially and after a design or process change that affects this parameter.
(3) tPU is the delay between the time VCC is stable and the device is ready to accept commands.
A.C. TEST CONDITIONS
Input Levels
0.2 x VCC to 0.8 x VCC
Input Rise and Fall Times
Input Reference Levels
0.3 x VCC, 0.7 x VCC
Output Reference Levels 0.5 x VCC
Output Load
Current Source: IOL = 3 mA (VCC ≥
2.5 V); IOL = 1 mA (VCC < 2.5 V); CL = 100 pF
© 2006 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
Doc No. 1118, Rev. A
3
CATALYST [ CATALYST SEMICONDUCTOR ]
