Advanced Information
CAT25C01/02/04/08/16
HOLD: Hold
STATUS REGISTER
HOLD is the HOLD pin. The HOLD pin is used to pause
transmission to the CAT25C01/02/04/08/16 while in the
middleofaserialsequencewithouthavingtore-transmit
entiresequenceatalatertime.Topause,HOLDmustbe
brought low while SCK is low. The SO pin is in a high
impedance state during the time the part is paused, and
transitions on the SI pins will be ignored. To resume
communication,HOLDisbroughthigh,whileSCKislow.
(HOLD should be held high any time this function is not
being used.) HOLD may be tied high directly to VCC or
tied to VCC through a resistor. Figure 9 illustrates hold
timing sequence.
The Status Register indicates the status of the device.
The RDY (Ready) bit indicates whether the CAT25C01/
02/04/08/16 is busy with a write operation. When set to
1awritecycleisinprogressandwhensetto0thedevice
indicates it is ready. This bit is read onlyThe WEL (Write
Enable) bit indicates the status of the write enable latch.
When set to 1, the device is in a Write Enable state and
when set to 0 the device is in a Write Disable state. The
WELbitcanonlybesetbytheWRENinstructionandcan
be reset by the WRDI instruction.
STATUS REGISTER
7
6
5
4
3
2
1
0
WPEN
PR_MODE SPI_MODE
X
BP1
BP0
WEL
RDY
BLOCK PROTECTION BITS
Status Register Bits
Array Address
Protected
None
Protection
BP1
0
BP0
0
No Protection
0
1
25C01: 60-7F
25C02: C0-FF
25C04: 180-1FF
25C08: 0300-03FF
25C16: 0600-07FF
Quarter Array Protection
Half Array Protection
Full Array Protection
1
1
0
1
25C01: 40-7F
25C02: 80-FF
25C04: 100-1FF
25C08: 0200-03FF
25C16: 0400-07FF
25C01: 00-7F
25C02: 00-FF
25C04: 000-1FF
25C08: 0000-03FF
25C16: 0000-07FF
WRITE PROTECT ENABLE OPERATION
Protected
Blocks
Unprotected
Blocks
Status
Register
WPEN
WP
WEL
0
X
0
Protected
Protected
Protected
Protected
Protected
Protected
Protected
Writable
Protected
Writable
Protected
Writable
Protected
Writable
0
1
X
1
0
1
0
1
Low
Low
High
High
Protected
Protected
Protected
Writable
1
X
X
Doc. No. 25067-00 5/00
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CATALYST [ CATALYST SEMICONDUCTOR ]
