欢迎访问ic37.com |
会员登录 免费注册
发布采购

CAT5401YI-10 参数 Datasheet PDF下载

CAT5401YI-10图片预览
型号: CAT5401YI-10
PDF下载: 下载PDF文件 查看货源
内容描述: 四路数字可编程电位计( DPP ™ )与64丝锥和SPI接口 [Quad Digitally Programmable Potentiometers (DPP⑩) with 64 Taps and SPI Interface]
分类和应用: 转换器电阻器光电二极管
文件页数/大小: 15 页 / 332 K
品牌: CATALYST [ CATALYST SEMICONDUCTOR ]
 浏览型号CAT5401YI-10的Datasheet PDF文件第1页浏览型号CAT5401YI-10的Datasheet PDF文件第3页浏览型号CAT5401YI-10的Datasheet PDF文件第4页浏览型号CAT5401YI-10的Datasheet PDF文件第5页浏览型号CAT5401YI-10的Datasheet PDF文件第6页浏览型号CAT5401YI-10的Datasheet PDF文件第7页浏览型号CAT5401YI-10的Datasheet PDF文件第8页浏览型号CAT5401YI-10的Datasheet PDF文件第9页  
CAT5401
PIN DESCRIPTIONS
Pin#
(SOIC)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Pin#
(TSSOP)
19
20
21
22
23
24
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
Name
V
CC
R
L0
R
H0
R
W0
¯¯¯
CS
¯¯¯
WP
SI
A1
R
L1
R
H1
R
W1
GND
NC
R
W2
R
H2
R
L2
SCK
¯¯¯¯¯
HOLD
SO
A0
R
W3
R
H3
R
L3
NC
Function
Supply Voltage
Low Reference Terminal
for Potentiometer 0
High Reference Terminal
for Potentiometer 0
Wiper Terminal for
Potentiometer 0
Chip Select
Write Protection
Serial Input
Device Address
Low Reference Terminal
for Potentiometer 1
High Reference Terminal
for Potentiometer 1
Wiper Terminal for
Potentiometer 1
Ground
No Connect
Wiper Terminal for
Potentiometer 2
High Reference Terminal
for Potentiometer 2
Low Reference Terminal
for Potentiometer 2
Bus Serial Clock
Hold
Serial Data Output
Device Address, LSB
Wiper Terminal for
Potentiometer 3
High Reference Terminal
for Potentiometer 3
Low Reference Terminal
for Potentiometer 3
No Connect
SI: Serial Input
SI is the serial data input pin. This pin is used to input all
opcodes, byte addresses and data to be written to the
CAT5401. Input data is latched on the rising edge of the
serial clock.
SO: Serial Output
SO is the serial data output pin. This pin is used to
transfer data out of the CAT5401. During a read cycle,
data is shifted out on the falling edge of the serial
clock.
SCK: Serial Clock
SCK is the serial clock pin. This pin is used to
synchronize the communication between the
microcontroller and the CAT5401. Opcodes, byte
addresses or data present on the SI pin are latched on
the rising edge of the SCK. Data on the SO pin is
updated on the falling edge of the SCK.
A0, A1: Device Address Inputs
These inputs set the device address when addressing
multiple devices. A total of four devices can be
addressed on a single bus. A match in the slave
address must be made with the address input in order
to initiate communication with the CAT5401.
R
H
, R
L
: Resistor End Points
The four sets of R
H
and R
L
pins are equivalent to the
terminal connections on a mechanical potentiometer.
R
W
: Wiper
The four R
W
pins are equivalent to the wiper terminal of
a mechanical potentiometer.
¯¯¯: Chip Select
CS
¯¯¯ is the Chip select pin. ¯¯¯ low enables the
CS
CS
CAT5401 and ¯¯¯ high disables the CAT5401. ¯¯¯
CS
CS
high takes the SO output pin to high impedance and
forces the devices into a Standby mode (unless an
internal write operation is underway). The CAT5401
draws ZERO current in the Standby mode. A high to
low transition on ¯¯¯ is required prior to any sequence
CS
being initiated. A low to high transition on ¯¯¯ after a
CS
valid write sequence is what initiates an internal write
cycle.
¯¯¯: Write Protect
WP
¯¯¯ is the Write Protect pin. The Write Protect pin will allow normal read/write operations when held high. When
WP
¯¯¯ is tied low, all non-volatile write operations to the Data registers are inhibited (change of wiper control register
WP
is allowed). ¯¯¯ going low while ¯¯¯ is still low will interrupt a write to the registers. If the internal write cycle has
WP
CS
already been initiated, ¯¯¯ going low will have no effect on any write operation.
WP
¯¯¯¯¯
HOLD: Hold
The ¯¯¯¯¯ pin is used to pause transmission to the CAT5401 while in the middle of a serial sequence without
HOLD
¯¯¯¯¯
having to retransmit entire sequence at a later time. To pause, HOLD must be brought low while SCK is low. The
SO pin is in a high impedance state during the time the part is paused, and transitions on the SI pins will be
¯¯¯¯¯
¯¯¯¯¯
ignored. To resume communication, HOLD is brought high, while SCK is low. (HOLD should be held high any
¯¯¯¯¯
time this function is not being used.) HOLD may be tied high directly to V
CC
or tied to V
CC
through a resistor.
2
Doc. No. MD-2012 Rev. G
© Catalyst Semiconductor, Inc.
Characteristics subject to change without notice