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CAT6218-180TD-GT3 参数 Datasheet PDF下载

CAT6218-180TD-GT3图片预览
型号: CAT6218-180TD-GT3
PDF下载: 下载PDF文件 查看货源
内容描述: 300毫安CMOS LDO稳压器 [300mA CMOS LDO Regulator]
分类和应用: 稳压器
文件页数/大小: 10 页 / 268 K
品牌: CATALYST [ CATALYST SEMICONDUCTOR ]
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CAT6218
PIN DESCRIPTIONS
Pin # Name Function
1
VIN Supply voltage input.
2
GND Ground reference.
Enable input (active high); a 2.5MΩ
3
EN
pull-down resistor is provided.
Optional bypass capacitor connection
4
BYP for noise reduction and PSRR
enhancing.
5 VOUT LDO Output Voltage.
BLOCK DIAGRAM
VIN
V
IN
EN
LDO
VOUT
V
OUT
BYP
Reference
Shutdown
Switch
GND
Figure 2. CAT6218 Functional Block Diagram
PIN FUNCTION
VIN
is the supply pin for the LDO. A small 1μF
ceramic bypass capacitor is required between the V
IN
pin and ground near the device. When using longer
connections to the power supply, C
IN
value can be
increased without limit. The operating input voltage
range is from 2.3V to 5.5V.
EN
is the enable control logic (active high) for the regu-
lator output. It has a 2.5MΩ pull-down resistor, which
assures that if EN pin is left open, the circuit is disabled.
VOUT
is the LDO regulator output. A small 1μF cera-
mic bypass capacitor is required between the V
OUT
pin
and ground for stability. For better transient response,
its value can be increased to 4.7μF.
The capacitor should be located near the device. ESR
domain is 5mΩ to 500mΩ. V
OUT
can deliver a maxi-
mum guaranteed current of 300mA. For input-to-
output voltages higher than 1V, a continuous 300mA
output current might turn-on the thermal protection. A
250Ω internal shutdown switch discharges the output
capacitor in the no-load condition.
GND
is the ground reference for the LDO. The pin
must be connected to the ground plane on the PCB.
BYP
is the reference bypass pin. An optional 0.01μF
capacitor can be connected between BYP pin and
GND to reduce the output noise and enhance the
PSRR at high frequency.
ABSOLUTE MAXIMUM RATINGS
Parameter
V
IN
V
EN
, V
OUT
Junction Temperature, T
J
Power Dissipation, P
D
Storage Temperature Range, T
S
Lead Temperature (soldering, 5 sec.)
ESD Rating (Human Body Model)
Rating
0 to 6.5
-0.3 to V
IN
+ 0.3
+150
Internally Limited
-65 to +150
260
3
Unit
V
V
°C
mW
°C
°C
kV
RECOMMENDED OPERATING CONDITIONS
Parameter
V
IN
V
EN
Junction Temperature Range, T
J
Package Thermal Resistance (SOT23-5),
θ
JA
Range
2.3 to 5.5
0 to V
IN
-40 to +125
235
Unit
V
V
°C
°C/W
Typical application circuit with external components is shown on page 1.
Notes:
(1) Exceeding maximum rating may damage the device
(2) The maximum allowable power dissipation at any T
A
(ambient temperature) is P
Dmax
= (T
Jmax
– T
A
)/θ
JA
. Exceeding the maximum allowable
power dissipation will result in excessive die temperature, and the regulator will go into thermal shutdown.
(3) The device is not guaranteed to work outside its operating rating.
Doc. No. MD-10010 Rev. C
2
©
Catalyst Semiconductor, Inc.
Characteristics subject to change without notice