CAT93C56/57
PIN CAPACITANCE
Symbol
C
OUT(2)
C
IN(2)
Test
Output Capacitance (DO)
Input Capacitance (CS, SK, DI, ORG)
Conditions
V
OUT
=0V
V
IN
=0V
Min
Typ
Max
5
5
Units
pF
pF
INSTRUCTION SET
Instruction
READ
ERASE
WRITE
EWEN
EWDS
ERAL
WRAL
Device
Type
93C56
(1)
93C57
93C56
(1)
93C57
93C56
(1)
93C57
93C56
(1)
93C57
93C56
(1)
93C57
93C56
(1)
93C57
93C56
(1)
93C57
Start
Bit
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Address
Opcode
10
10
11
11
01
01
00
00
00
00
00
00
00
00
x8
A8-A0
A7-A0
A8-A0
A7-A0
A8-A0
A7-A0
11XXXXXXX
11XXXXXX
00XXXXXXX
00XXXXXX
10XXXXXXX
10XXXXXX
01XXXXXXX
01XXXXXX
Data
x8
x16
Comments
Read Address AN– A0
Clear Address AN– A0
D7-D0
D7-D0
D15-D0 Write Address AN– A0
D15-D0
Write Enable
Write Disable
Clear All Addresses
D7-D0
D7-D0
D15-D0 Write All Addresses
D15-D0
x16
A7-A0
A6-A0
A7-A0
A6-A0
A7-A0
A6-A0
11XXXXXX
11XXXXX
00XXXXXX
00XXXXX
10XXXXXX
10XXXXX
01XXXXXX
01XXXXX
A.C. CHARACTERISTICS
Limits
V
CC
=
1.8V-6V
Symbol
t
CSS
t
CSH
t
DIS
t
DIH
t
PD1
t
PD0
t
HZ(1)
t
EW
t
CSMIN
t
SKHI
t
SKLOW
t
SV
SK
MAX
Parameter
CS Setup Time
CS Hold Time
DI Setup Time
DI Hold Time
Output Delay to 1
Output Delay to 0
Output Delay to High-Z
Program/Erase Pulse Width
Minimum CS Low Time
Minimum SK High Time
Minimum SK Low Time
Output Delay to Status Valid
Maximum Clock Frequency
DC
1
1
1
1
250
DC
C
L
= 100pF
(3)
Test
Conditions
Min
200
0
400
400
1
1
400
10
0.5
0.5
0.5
0.5
500
DC
Max
V
CC
=
2.5V-6V
Min
100
0
200
200
0.5
0.5
200
10
0.25
0.25
0.25
0.25
1000
Max
V
CC
=
4.5V-5.5V
Min
50
0
100
100
0.25
0.25
100
10
Max
Units
ns
ns
ns
ns
µs
µs
ns
ms
µs
µs
µs
µs
kHz
Note:
(1) Address bit A8 for 256x8 ORG and A7 for 128x16 ORG are "Don't Care" bits, but must be kept at either a "1" or "0" for READ, WRITE
and ERASE commands.
(2) This parameter is tested initially and after a design or process change that affects the parameter.
3
Doc. No. 1088, Rev. M
CATALYST [ CATALYST SEMICONDUCTOR ]
