CM6800
LOW START-UP CURRENT PFC/PWM CONTROLLER COMBO
One of the advantages of this control technique is that it
required only one system clock. Switch 1(SW1) turns off and
Leading/Trailing Modulation
Conventional Pulse Width Modulation (PWM) techniques
employ trailing edge modulation in which the switch will turn
on right after the trailing edge of the system clock. The error
amplifier output is then compared with the modulating ramp
up. The effective duty cycle of the trailing edge modulation
is determined during the ON time of the switch. Figure 4
shows a typical trailing edge control scheme.
switch 2 (SW2) turns on at the same instant to minimize the
momentary “no-load” period, thus lowering ripple voltage
generated by the switching action. With such synchronized
switching, the ripple voltage of the first stage is reduced.
Calculation and evaluation have shown that the 120Hz
component of the PFC’s output ripple voltage can be
reduced by as much as 30% using this method.
In case of leading edge modulation, the switch is turned
OFF right at the leading edge of the system clock. When
the modulating ramp reaches the level of the error amplifier
output voltage, the switch will be turned ON. The effective
duty-cycle of the leading edge modulation is determined
during OFF time of the switch. Figure 5 shows a leading
edge control scheme.
2008/10/23 Rev. 2.1
Champion Microelectronic Corporation
Page 14
CHAMP [ CHAMPION MICROELECTRONIC CORP. ]
