CM6903/4
Low Pin Count PFC/PWM C
ONTROLLER
C
OMBO
Functional Description
The CM6903/4 consists of an ICST (Input Current Shaping
Technique), CCM (Continuous Conduction Mode) or DCM
(Discontinuous Conduction Mode) boost PFC (Power
Factor Correction) front end and a synchronized PWM
(Pulse Width Modulator) back end. The CM6903/4 is pin to
pin compatible with FAN6903/4 (9 pin SIP package), which
is the second generation of the ML4803 with 8 pin package.
It is distinguished from earlier combo controllers by its low
count, innovative input current shaping technique, and very
low start-up and operating currents. The PWM section is
dedicated to peak current mode operation. It uses
conventional trailing-edge modulation, while the PFC uses
leading-edge modulation. This patented Leading
Edge/Trailing Edge (LETE) modulation technique helps to
minimize ripple current in the PFC DC buss capacitor.
The main improvements from ML4803 are:
1.) Remove the one pin error amplifier and add back
the slew rate enhancement gmv, which is using
voltage input instead of current input. This
transconductance amplifier will increase the
transient response 5 to 10 times from the
conventional OP
2.) VFB PFC OVP comparator
3.) Tri-fault Detect for UL1950 compliance and
enhanced safety
4.) A feedforward signal from IAC pin is added to do
the automatic slope compensation. This
increases the signal to noise ratio during the light
load; therefore, THD is improved at light load and
high input line voltage.
5.) CM6903 does not require the bleed resistor and
it uses the less than 500k ohm resistor between
IAC pin and rectified line voltage to feed the
initial current before the chip wakes up.
6.) VINOK comparator is added to guaranteed PWM
cannot turn on until VFB reaches 2.5V in which PFC
boost output is about steady state, typical 380V.
7.) A 10mS digital PWM soft start circuit is added
8.) 9 pin SIP package
9.) No internal Zener but with VCCOVP comparator
The CM6903 operates both PFC and PWM sections at
67kHz, while the CM6904 operates the PWM section at
twice the frequency (134kHz) of the PFC. This allows the
use of smaller PWM magnetic and output filter components,
while minimizing switching losses in the PFC stage.
Several protection features have been built into the
CM6903/4. These include soft-start, redundant PFC
overvoltage protection, Tri-Fault Detect, VINOK, peak
current limiting, duty cycle limiting, under-voltage lockout,
reference ok comparator and VCCOVP.
Detailed Pin Descriptions
DCILIMIT (Pin 1)
This pin is tied to the primary side PWM current sense
resistor or transformer. It provides the internal pulse-by-pulse
current limit for the PWM stage (which occurs at 1.5V) and
the peak current mode feedback path for the current mode
control of the PWM stage. Besides current information, the
optocouple also goes into DCILIMIT pin. Therefore, it is the
SUM Amplifier input.
VCC (Pin 2)
VCC is the power input connection to the IC. The VCC
start-up current is 100uA. The no-load ICC current is 2mA.
VCC quiescent current will include both the IC biasing
currents and the PFC and PWM output currents. Given the
operating frequency and the MOSFET gate charge (Qg),
average PFC and PWM output currents can be calculated as
IOUT = Qg x F. The average magnetizing current required for
any gate drive transformers must also be included. The VCC
pin is also assumed to be proportional to the PFC output
voltage. Internally it is tied to the VCC OVP comparator
(17.9V) providing redundant high-speed over-voltage
protection (OVP) of the PFC stage. VCC also ties internally
to the UVLO circuitry and VREFOK comparator, enabling the
IC at 15V and disabling it at 10V. VCC must be bypassed
with a high quality ceramic bypass capacitor placed as close
as possible to the IC. Good bypassing is critical to the proper
operation of the CM6903/4.
VCC is typically produced by an additional winding off the
boost inductor or PFC Choke, providing a voltage that is
proportional to the PFC output voltage. Since the VCC OVP
max voltage is 17.9V, an internal shunt limits VCC
overvoltage to an acceptable value. An external clamp, such
as shown in Figure 1, is desirable but not necessary.
VCC
1N 5250B
GND
Fig ure 1. O ptional V C C C lam p
This limits the maximum VCC that can be applied to the IC
while allowing a VCC which is high enough to trip the VCC
OVP. An RC filter at VCC is required between boost trap
winding and VCC.
2002/12/16
Preliminary
Rev. 0.4
Champion Microelectronic Corporation
Page 6
CHAMP [ CHAMPION MICROELECTRONIC CORP. ]
